ADS5240

BurrĆBrown Products from Texas Instruments ADS5240 ¨ SBAS326C – JUNE 2004 – REVISED DECEMBER 2004 4-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface FEATURES Maximum Sample Rate: 40MSPS 12-Bit Resolution No Missing Codes Power Dissipation: 607mW CMOS Technology Simultaneous Sample-and-Hold 70.5dBFS SNR at 10MHz IF Internal and External References 3.3V Digital/Analog Supply Serialized LVDS Outputs Integrated Frame and Bit Patterns MSB and LSB First Modes Option to Double LVDS Clock Output Currents Pin- and Format-Compatible Family HTQFP-64 PowerPAD™ Package An integrated phase lock loop multiplies the incoming ADC sampling clock by a factor of 12. This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are transmitted as LVDS clock outputs. The 6x clock is denoted by the differential pair LCLKP and LCLKN, while the 1x clock is denoted by ADCLKP and ADCLKN. The word output of each ADC channel can be transmitted either as MSB or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be latched by the receiver on both the rising and falling edges of the 6x clock. The ADS5240 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode. The device is available in an HTQFP-64 PowerP...