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ADS5273 Dataheets PDF



Part Number ADS5273
Manufacturers Burr-Brown Corporation
Logo Burr-Brown Corporation
Description 70MSPS ADC
Datasheet ADS5273 DatasheetADS5273 Datasheet (PDF)

ADS5273 SBAS305A − JANUARY 2004 − REVISED FEBRUARY 2004 8-Channel, 12-Bit, 70MSPS ADC with Serialized LVDS Interface D Maximum Sample Rate: 70MSPS D 12-Bit Resolution D No Missing Codes www.DataSheet4U.com D Power Dissipation: 1.1W D CMOS Technology D Simultaneous Sample-and-Hold D 70.5dB SNR at 10MHz IF D Serialized LVDS Outputs Meet or Exceed the Requirements of ANSI TIA/EIA-644-A Standard FEATURES The ADS5273 provides an internal reference, or can optionally be driven with an external ref.

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ADS5273 SBAS305A − JANUARY 2004 − REVISED FEBRUARY 2004 8-Channel, 12-Bit, 70MSPS ADC with Serialized LVDS Interface D Maximum Sample Rate: 70MSPS D 12-Bit Resolution D No Missing Codes www.DataSheet4U.com D Power Dissipation: 1.1W D CMOS Technology D Simultaneous Sample-and-Hold D 70.5dB SNR at 10MHz IF D Serialized LVDS Outputs Meet or Exceed the Requirements of ANSI TIA/EIA-644-A Standard FEATURES The ADS5273 provides an internal reference, or can optionally be driven with an external reference. Best performance can be achieved through the internal reference mode. The device is available in a PowerPAD TQFP-80 package and is specified over a −40°C to +85°C operating range. 6X ADCLK LCLKP LCLKN PLL ADCLK 1X ADCLK ADCLKP ADCLKN D Internal and External References D 3.3V Digital/Analog Supply D TQFP-80 PowerPAD Package IN1P IN1N IN2P IN2N IN3P IN3N IN4P IN4N S/H 12− Bit ADC Serializer OUT1P OUT1N OUT2P OUT2N OUT3P OUT3N OUT4P OUT4N OUT5P OUT5N OUT6P OUT6N OUT7P OUT7N OUT8P OUT8N S/H APPLICATIONS 12− Bit ADC Serializer D Portable Ultrasound Systems D Tape Drives D Test Equipment S/H 12− Bit ADC Serializer S/H 12− Bit ADC Serializer DESCRIPTION The ADS5273 is a high-performance, 70MSPS, 8-channel parallel analog-to-digital converter (ADC). An internal reference is provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS outputs reduce the number of interface lines and package size. In LVDS (low-voltage differential signaling), an integrated phase lock loop multiplies the incoming ADC sampling clock by a factor of 6. This high-frequency LVDS clock is used in the data serialization and transmission process and is converted to an LVDS signal for transmission in parallel with the data. Providing this additional LVDS clock allows for easy delay matching. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. The bit following the rising edge of the ADC clock output is the first bit of the word. IN5P IN5N IN6P IN6N IN7P IN7N IN8P IN8N S/H 12− Bit ADC Serializer S/H 12− Bit ADC Serializer S/H 12− Bit ADC Serializer S/H 12− Bit ADC Serializer Reference Registers Control CS SCLK Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright  2004, Texas Instruments Incorporated www.ti.com SDATA REFT VCM REFB INT/EXT RESET PD PRODUCT PREVIEW ADS5273 www.ti.com SBAS305A − JANUARY 2004 − REVISED FEBRUARY 2004 ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage Range, AVDD . . . . . . . . . . . . . . . . . . −0.3V to 3.8V Supply Voltage Range, LVDD . . . . . . . . . . . . . . . . . . −0.3V to 3.8V Voltage Between AVSS and LVSS . . . . . . . . . . . . . . −0.3V to 0.3V Voltage Between AVDD and LVDD . . . . . . . . . . . . . . −0.3V to 0.3V Voltages Applied to External REF Pins . . . . . . . . . . −0.3V to 2.4V All LVDS Data and Clock Outputs . . . . . . . . . . . . . . −0.3V to 2.4V ADCLK Peak Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . TBD Peak Total Input Current (all inputs) . . . . . . . . . . . . . . . . . . . −30mA Operating Free-Air Temperature Range, TA . . . . . . −40°C to 85°C Lead Temperature 1.6mm (1/16″ from case for 10s) . . . . . . 235°C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods www.DataSheet4U.com may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION PRODUCT PREVIEW PRODUCT ADS5273 PACKAGE-LEAD HTQFP-80 PACKAGE DESIGNATOR(1) PFP SPECIFIED TEMPERATURE RANGE −40°C to +85°C PACKAGE MARKING ADS5273IPFP ORDERING NUMBER ADS5273IPFP ADS5273IPFPT TRANSPORT MEDIA, QUANTITY Tray, 96 Tape and Reel, 250 ″ ″ ″ ″ ″ (1) For the most current specification and package information, refer to our web si.


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