Document
uPSD33xx
Turbo Series Fast 8032 MCU with Programmable Logic
PRELIMINARY DATA
FEATURES SUMMARY
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FAST 8-BIT TURBO 8032 MCU, 40MHz Advanced core, 4-clocks per instruction – 10 MIPs peak performance at 40MHz (5V) – JTAG Debug and In-System Programming – Branch Cache & 6 instruction Prefetch Queue – Dual XDATA pointers with auto incr & decr – Compatible with 3rd party 8051 tools DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT – Place either memory into 8032 program address space or data address space – READ-while-WRITE operation for InApplication Programming and EEPROM emulation – Single voltage program and erase – 100K guaranteed erase cycles, 15-year retention CLOCK, RESET, AND SUPPLY MANAGEMENT – SRAM is Battery Backup capable – Flexible 8-level CPU clock divider register – Normal, Idle, and Power Down Modes – Power-on and Low Voltage reset supervisor – Programmable Watchdog Timer PROGRAMMABLE LOGIC, GENERAL PURPOSE – 16 macrocells – Create shifters, state machines, chipselects, glue-logic to keypads, panels, LCDs, others COMMUNICATION INTERFACES – I2C Master/Slave controller, 833KHz – SPI Master controller, 10MHz – Two UARTs with independent baud rate – IrDA protocol support up to 115K baud – Up to 46 I/O, 5V tolerant on 3.3V uPSD33xxV
Figure 1. Packages
TQFP52 (T) 52-lead, Thin, Quad, Flat
TQFP80 (U) 80-lead, Thin, Quad, Flat
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A/D CONVERTER – Eight Channels, 10-bit resolution, 6µs TIMERS AND INTERRUPTS – Three 8032 standard 16-bit timers – Programmable Counter Array (PCA), six 16-bit modules for PWM, CAPCOM, and timers – 8/10/16-bit PWM operation – 11 Interrupt sources with two external interrupt pins OPERATING VOLTAGE SOURCE (±10%) – 5V devices use both 5.0V and 3.3V sources – 3.3V devices use only 3.3V source
January 2005
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This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
uPSD33xx
Table 1. Device Summary
Part Number uPSD3312D-40T6 uPSD3312DV-40T6 uPSD3333D-40T6 uPSD3333DV-40T6 uPSD3333D-40U6
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1st Flash (bytes) 64K 64K 128K 128K 128K 128K 256K 256K 256K 256K 256K 256K
2nd Flash (bytes) 16K 16K 32K 32K 32K 32K 32K 32K 32K 32K 32K 32K
SRAM (bytes) 2K 2K 8K 8K 8K 8K 8K 8K 32K 32K 32K 32K
GPIO 37 37 37 37 46 46 46 46 37 37 46 46
8032 Bus No No No No Yes Yes Yes Yes No No Yes Yes
VCC 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V
VDD 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V
Pkg.
Temp.
TQFP52 –40°C to 85°C TQFP52 –40°C to 85°C TQFP52 –40°C to 85°C TQFP52 –40°C to 85°C TQFP80 –40°C to 85°C TQFP80 –40°C to 85°C TQFP80 –40°C to 85°C TQFP80 –40°C to 85°C TQFP52 –40°C to 85°C TQFP52 –40°C to 85°C TQFP80 –40°C to 85°C TQFP80 –40°C to 85°C
uPSD3333DV-40U6 uPSD3334D-40U6 uPSD3334DV-40U6 uPSD3354D-40T6 uPSD3354DV-40T6 uPSD3354D-40U6 uPSD3354DV-40U6
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uPSD33xx
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 uPSD33xx HARDWARE DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 MEMORY www.DataSheet4U.com ORGANIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Internal Memory (MCU Module, Standard 8032 Memory: DATA, IDATA, SFR) . . . . . . . . . . . . 16 External Memory (PSD Module: Program memory, Data memory). . . . . . . . . . . . . . . . . . . . . . 16 8032 MCU CORE PERFORMANCE ENHANCEMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Pre-Fetch Queue (PFQ) and Branch Cache (BC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PFQ Example, Multi-cycle Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Aggregate Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 MCU MODULE DISCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8032 MCU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Data Pointer (DPTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Program Counter (PC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..