AD8197A

4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A 4 TMDS channels per link Supports 250 Mbps to 2.25 Gbps data rates Supports 25 MHz to 225 MHz pixel clocks Equalized inputs for operation with long HDMI cables www.DataSheet4U.com (20 meters at 2.25 Gbps) Fully buffered unidirectional inputs/outputs Globally switchable, 50 Ω on-chip terminations Pre-emphasized outputs Low added jitter Single-supply operation (3.3 V) 4 auxiliary channels per link Bidirectional unbuffered inputs/outputs Flexible supply operation (3.3 V to 5 V) HDCP standard compatible Allows switching of DDC bus and 2 additional signals Output disable feature Reduced power dissipation Removable output termination Allows building of larger arrays 2 AD8197A devices support HDMI/DVI dual-link Standards compatible: HDMI receiver, HDCP, DVI Serial (I2C slave) and parallel control interface 100-lead, 14 mm × 14 mm LQFP, Pb-free package FUNCTIONAL BLOCK DIAGRAM PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] RESET PARALLEL SERIAL I2C_SDA I2C_SCL I2C_ADDR[2:0] VTTI 2 2 AD8197A CONTROL LOGIC AVCC DVCC AMUXVCC AVEE DVEE VTTO 3 CONFIG INTERFACE + IP_A[3:0] IN_A[3:0] – + IP_B[3:0] 4 4 4 4 4 4 4 4 4 4 IN_B[3:0] – + IP_C[3:0] IN_C[3:0] – + IP_D[3:0] IN_D[3:0] – SWITCH CORE EQ PE + OP[3:0] – ON[3:0] HIGH SPEED VTTI AUX_A[3:0] AUX_B[3:0] AUX_C[3:0] AUX_D[3:0] BUFFERED 4 4 4 4 SWITCH CORE LOW SPEED ...