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Inverter Driver. FAN7313 Datasheet |
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FAN7313
LCD Backlight Inverter Drive IC
September 2006
Features
High-Efficiency Single-Stage Power Conversion
Wide Input Voltage Range: 4.5V to 25.5V
Backlight Lamp Ballast and Soft Dimming
Reduces Required External Components
www.DataSheet4U.comPrecision Voltage Reference Trimmed to 2%
Push-Pull Topology
Soft-Start Capability
PWM Control at Fixed Frequency
Analog and Burst Dimming Functions
Open-Lamp Protection
Open-Lamp Regulation
Over-Voltage Protection
Short-Circuit Protection
20-Pin SOIC
Applications
LCD TV
LCD Monitor
Description
FAN7313 provides all the control functions for a series
parallel resonant converter as well as a pulse width mod-
ulation (PWM) controller to develop a supply voltage.
Typical operating frequency range is between 30kHz and
250kHz, depending on the cold cathode fluorescent
lamp (CCFL) and the transformer’s characteristics.
20-SOIC
Ordering Information
Part Number
FAN7313M
FAN7313MX
Package
20-SOIC
20-SOIC
Pb-Free
Yes
Yes
Operating Temperature Range
-25°C ~ 85°C
Packing Method
Rail
Tape & Reel
© 2006 Fairchild Semiconductor Corporation
FAN7313 Rev. 1.0.0
www.fairchildsemi.com
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Internal Block Diagram
ENA
VIN
1.25V
1μA
+
-
UVLO 4.5V
VIN
+
-
DRV 6V
Internal
Voltage
Reference
UVLO
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+
3V -
+
0.25V
2V -
Timer
16 switching
cycles @ Normal
2s @ Strike
+
- 2V
OLR
BDIM
BCT/FT
-
2V +
Positive dimming polarity
Gm Amp. with only
sink current
Disable @ Striking
max. 2V
min. 0.5V
FAULT
BDIM
VBURST
Controller
2.3V
Protection
TSD 150 °C
FAULT
0.45*Va +
-
Input
Control
Logic
VSS_STK
Drivers
VREF
FB
ADIM Va
CMP
2.2V
-
+
+
Error Amp.
VSS_STK
OLP1
20μA
-
1V +
Output
Control
Logic
VSS_STK
OSC
max. 2V
min. 0.5V
Frequency sweep 4ms
Fstrike: Fnormal = 1.3:1
-
20μA
+ 1V
VREF
SCP
VB
OUTH
VS
OUTL
GND
RT
OLP3
OLP2
20μA
-
1V +
-
20μA
+ 1V
OLP4
Figure 1. Functional Block Diagram of FAN7313
FAN7313 Rev. 01
© 2006 Fairchild Semiconductor Corporation
FAN7313 Rev. 1.0.0
2
www.fairchildsemi.com
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Pin Assignments
OLP3 OLP4 OLR BCT/FT RT
20 19 18 17 16
SCP
15
VS OUTH VB
14 13 12
VIN
11
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FAN7313
1 2 3 4 5 6 7 8 9 10
OLP1 OLP2 CMP FB BDIM ADIM ENA GND OUTL VREF
FAN7313 Rev. 00
Figure 2. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
Name
OLP1
OLP2
CMP
FB
BDIM
ADIM
ENA
8 GND
9 OUTL
10 VREF
Description
Open-Lamp Protection 1
Open-Lamp Protection 2
Error Amplifier Output
Error Amplifier Input
Burst Dimming Input
Analog Dimming Input
Enable Input
Ground
Low-Side Driver Output
Reference Voltage
Pin #
11
12
13
14
15
16
17
18
19
20
Name
VIN
VB
OUTH
VS
SCP
RT
BCT/FT
OLR
OLP4
OLP3
Description
Supply Voltage
Connected to VREF Internally
High-Side Driver Output
Connected to GND Internally
Short-Circuit Protection
Timing Resistor
Burst Dimming Timing Capacitor/
Fault Signal Output
Open-Lamp Regulation
Open-Lamp Protection 4
Open-Lamp Protection 3
© 2006 Fairchild Semiconductor Corporation
FAN7313 Rev. 1.0.0
3
www.fairchildsemi.com
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