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LM5002 Dataheets PDF



Part Number LM5002
Manufacturers National Semiconductor
Logo National Semiconductor
Description Regulator
Datasheet LM5002 DatasheetLM5002 Datasheet (PDF)

LM5002 High Voltage Switch Mode Regulator May 2007 LM5002 High Voltage Switch Mode Regulator General Description The LM5002 high voltage switch mode regulator features all of the functions necessary to implement efficient high voltage Boost, Flyback, SEPIC and Forward converters, using few external components. This easy to use regulator integrates a 75 Volt N-Channel MOSFET with a 0.5 Amp peak current limit. Current mode control provides inherently simple loop compensation and line-voltage fee.

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LM5002 High Voltage Switch Mode Regulator May 2007 LM5002 High Voltage Switch Mode Regulator General Description The LM5002 high voltage switch mode regulator features all of the functions necessary to implement efficient high voltage Boost, Flyback, SEPIC and Forward converters, using few external components. This easy to use regulator integrates a 75 Volt N-Channel MOSFET with a 0.5 Amp peak current limit. Current mode control provides inherently simple loop compensation and line-voltage feed-forward for superior rewww.DataSheet4U.com jection of input transients. The switching frequency is set with a single resistor and is programmable up to 1.5MHz. The oscillator can also be synchronized to an external clock. Additional protection features include: current limit, thermal shutdown, under-voltage lockout and remote shutdown capability. The device is available in both SO-8 and LLP-8 packages. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Integrated 75 volt N-Channel MOSFET Ultra-wide input voltage range from 3.1V to 75V Integrated high voltage bias regulator Adjustable output voltage 1.5% output voltage accuracy Current mode control with selectable compensation Wide bandwidth error amplifier Integrated current sensing and limiting Integrated slope compensation 85% maximum duty cycle limit Single resistor oscillator programming Oscillator synchronization capability Enable / Undervoltage Lockout (UVLO) pin Thermal shutdown Packages ■ SO-8 ■ LLP-8 (4mm x 4mm) Typical Application Circuit 30004501 Boost Regulator Application Schematic © 2007 National Semiconductor Corporation 300045 www.national.com LM5002 Connection Diagrams Top View SO-8 Package Top View LLP-8 Package 30004503 30004502 www.DataSheet4U.com Ordering Information Order Number LM5002MA LM5002MAX LM5002SD LM5002SDX Package Type SO-8 SO-8 LLP-8 LLP-8 NSC Package Drawing M08A M08A SDC08A SDC08A Supplied As 95 Units in a Rail 2500 Units on Tape and Reel 1000 Units on Tape and Reel 4500 Units on Tape and Reel Pin Descriptions Pin SO 1 2 3 LLP 3 4 5 Name SW VIN VCC Description Switch pin Input supply pin Application Information The drain terminal of the internal power MOSFET. Nominal operating range: 3.1V to 75V. Bias regulator output, or input for external VCC tracks VIN up to 6.9V. Above VIN = 6.9V, VCC is bias supply regulated to 6.9 Volts. A 0.47 µF or greater ceramic decoupling capacitor is required. An external voltage (7V – 12V) can be applied to this pin which disables the internal VCC regulator to reduce internal power dissipation and improve converter efficiency. Ground Oscillator frequency programming and optional synchronization pulse input Internal reference for the regulator control functions and the power MOSFET current sense resistor connection. The internal oscillator is set with a resistor, between this pin and the GND pin. The recommended frequency range is 50KHz to 1.5 MHz. The RT pin can accept synchronization pulses from an external clock. A 100 pF capacitor is recommended for coupling the synchronizing clock to the RT pin. 4 5 6 7 GND RT 6 8 FB Feedback input from the regulated output This pin is connected to the inverting input of the internal voltage error amplifier. The 1.26V reference is internally connected to the non-inverting input of the error amplifier. Open drain output of the internal error amplifier The loop compensation network should be connected between the COMP pin and the FB pin. COMP pull-up is provided by an internal 5 kΩ resistor which may be used to bias an opto-coupler transistor (while FB is grounded) for isolated ground applications. 7 1 COMP www.national.com 2 LM5002 Pin SO 8 LLP 2 Name EN Description Enable / Under Voltage Lock-Out / Shutdown input Application Information An external voltage divider can be used to set the line undervoltage lockout threshold. If the EN pin is left unconnected, a 6 µA pull-up current source pulls the EN pin high to enable the regulator. Exposed metal pad on the underside of the package with a resistive connection to pin 6. It is recommended to connect this pad to the PC board ground plane in order to improve heat dissipation. NA EP EP Exposed Pad, LLP only www.DataSheet4U.com 3 www.national.com LM5002 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN to GND SW to GND (Steady State) VCC, EN to GND COMP, FB, RT to GND Maximum Junction Temperature 76V -0.3V to 76V 14V -0.3V to 7V 150°C Storage Temperature ESD Rating (Note 2) Human Body Model −65°C to +150°C 2kV Operating Conditions VIN Operating Junction Temperature 3.1V to 75V −40°C to +125°C Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent .


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