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AN311

Silicon Laboratories

CP2120 PORTING GUIDE

A N 3 11 CP2120 P O R T I N G G U I D E Relevant Devices This application note applies to the CP2120. 1. Introduction m...


Silicon Laboratories

AN311

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A N 3 11 CP2120 P O R T I N G G U I D E Relevant Devices This application note applies to the CP2120. 1. Introduction making www.DataSheet4U.com The CP2120 SPI to SMBus bridge device can be used as a replacement for the Philips SC18IS60x device by only a few minor hardware and firmware design modifications. All firmware and hardware differences between the SC18IS60x and CP2120 are outlined in Table 1. Table 1. Improvement and Modification Summary SCI18IS60x Up to 6 general purpose I/O pins 96-byte buffers CP2120 8 general purpose I/O pins 256-byte buffers Ability to write a data buffer to up to 255 slave address Edge Triggered Interrupt Source Ability to read received byte buffer size SCL Low for SMBus compatibility Free Bus Detect for SMBus compatibility No transition byte needed Up to 3 MHz SPI frequency Transition byte between SPI command write and read phases Up to 1 MHz SPI frequency SMBus clock configuration 4.4 mm package size 4 mm package size Section 2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.1.6 2.1.6 2.1.1 2.1.2 2.1.3 3 2. Firmware The CP2120 responds to all SC18IS60x commands, including all Internal Register reads, writes, and all Internal Register reads and writes and all SMBus related commands. The CP2120 offers additional Internal Registers and commands that enhance performance of designs currently using the SC18IS60x device. However, designers must make certain modifications, which are discussed in the following sections, to their existing SPI Master interface in orde...




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