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AT25DF081 Dataheets PDF



Part Number AT25DF081
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description 8-megabit 1.65-volt Minimum SPI Serial Flash Memory
Datasheet AT25DF081 DatasheetAT25DF081 Datasheet (PDF)

Features www.DataSheet4U.com • Single 1.65V - 1.95V Supply • Serial Peripheral Interface (SPI) Compatible – Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture – 4-Kbyte Blocks – 32-Kbyte Blocks – 64-Kbyte Blocks – Full Chip Erase Individual Sector Protection with Global Protect/Unprotect Feature – Sixteen 64-Kbyte Physical Sectors Hardware Controlled Locking of Protected Sectors Flexible Programming – Byte/Page Program (1 to 256 Bytes) Automatic .

  AT25DF081   AT25DF081



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Features www.DataSheet4U.com • Single 1.65V - 1.95V Supply • Serial Peripheral Interface (SPI) Compatible – Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture – 4-Kbyte Blocks – 32-Kbyte Blocks – 64-Kbyte Blocks – Full Chip Erase Individual Sector Protection with Global Protect/Unprotect Feature – Sixteen 64-Kbyte Physical Sectors Hardware Controlled Locking of Protected Sectors Flexible Programming – Byte/Page Program (1 to 256 Bytes) Automatic Checking and Reporting of Erase/Program Failures JEDEC Standard Manufacturer and Device ID Read Methodology Low Power Dissipation – 7 mA Active Read Current (Typical) – 8 µA Deep Power-Down Current (Typical) Endurance: 100,000 Program/Erase Cycles Data Retention: 20 Years Complies with Full Industrial Temperature Range Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options – 8-lead SOIC (150-mil wide) – 8-contact Ultra Thin DFN (5 mm x 6 mm x 0.6 mm) – 11-ball dBGA (WLCSP) • • • • • • 8-megabit 1.65-volt Minimum SPI Serial Flash Memory AT25DF081 • • • • 1. Description The AT25DF081 is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT25DF081, with its erase granularity as small as 4-Kbytes, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices. The physical sectoring and the erase block sizes of the AT25DF081 have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density. 3674E–DFLASH–8/08 www.DataSheet4U.com The AT25DF081 also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where program code is patched or updated on a subroutine or module basis, or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT25DF081 incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process since sectors do not have to be unprotected one-by-one prior to initial programming. Specifically designed for use in 1.8-volt systems, the AT25DF081 supports read, program, and erase operations with a supply voltage range of 1.65V to 1.95V. No separate voltage is required for programming and erasing. 2 AT25DF081 3674E–DFLASH–8/08 AT25DF081 2. Pin Descriptions and Pinouts www.DataSheet4U.com Table 2-1. Symbol Pin Descriptions Name and Function CHIP SELECT: Asserting the CS pin selects the device. When the CS pin is deasserted, the device will be deselected and normally be placed in standby mode (not Deep Power-Down mode), and the SO pin will be in a high-impedance state. When the device is deselected, data will not be accepted on the SI pin. A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition is required to end an operation. When ending an internally self-timed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation. SERIAL CLOCK: This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command, address, and input data present on the SI pin is always latched on the rising edge of SCK, while output data on the SO pin is always clocked out on the falling edge of SCK. SERIAL INPUT: The SI pin is used to shift data into the device. The SI pin is used for all data input including command and address sequences. Data on the SI pin is always latched on the rising edge of SCK. SERIAL OUTPUT: The SO pin is used to shift data out from the device. Data on the SO pin is always clocked out on the falling edge of SCK. WRITE PROTECT: The WP pin controls the hardware locking feature of the device. Please refer to “Protection Commands and Features” on page 12 for more details.


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