HD74LS138

www.DataSheet4U.com HD74LS138 3-Line-to-8-Line Decoders / Demultiplexers REJ03D0434–0300 Rev.3.00 Jul.13.2005 The HD74LS138 decodes one-of-eight line dependent on the conditions at the three binaly select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. Features Ordering Information Part Name HD74LS138P HD74LS138FPEL HD74LS138RPEL Package Type DILP-16 pin SOP-16 pin (JEITA) SOP-16 pin (JEDEC) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) Package Abbreviation P FP Taping Abbreviation (Quantity) EL (2,000 pcs/reel) EL (2,500 pcs/reel) PRSP0016DG-A RP (FP-16DNV) Note: Please consult the sales office for the above package availability. Pin Arrangement A Select Inputs B C G2A Enable Inputs G2B G1 1 A 2 3 4 5 6 7 8 B C G2A G2B G1 Y7 Y6 Y0 Y1 Y2 Y3 Y4 Y5 16 15 14 13 12 11 10 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Outputs Outputs Y7 GND (Top view) Rev.3.00, Jul.13.2005, page 1 of 7 HD74LS138 Function Table Inputs www.DataSheet4U.com Enable G1 X L H H H H H H H H G2* H X L L L L L L L L C X X L L L L H H H H Select B X X L L H H L L H H Outputs A X X L H L H L H L H Y0 H H L H H H H H H H Y1 H H H L H H H H H H Y2 H H H H L H H H H H Y3 H H H H H L H H H H Y4 H...