DatasheetsPDF.com

AT68166FT Dataheets PDF



Part Number AT68166FT
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description Rad Hard 16 MegaBit 3.3V 5V Tolerant SRAM Mult
Datasheet AT68166FT DatasheetAT68166FT Datasheet (PDF)

Features • • • • • • • • • • • • • • • 16 www.DataSheet4U.com Mbit SRAM Multi Chip Module Allows 32-, 16- or 8-bit access configuration Operating Voltage: 3.3V + 0.3V, 5V Tolerant Access Time: – 25 ns, 20 ns – 18 ns (preliminary information) Very Low Power Consumption – Active: 595 mW per byte (Max) @ 20 ns(1), 415mW per byte (Max) @ 50ns(2) – Standby: 15 mW (Typ) Military Temperature Range: -55 to +125°C TTL-Compatible Inputs and Outputs Asynchronous Die manufactured on Atmel 0.25 µm Radiation .

  AT68166FT   AT68166FT


Document
Features • • • • • • • • • • • • • • • 16 www.DataSheet4U.com Mbit SRAM Multi Chip Module Allows 32-, 16- or 8-bit access configuration Operating Voltage: 3.3V + 0.3V, 5V Tolerant Access Time: – 25 ns, 20 ns – 18 ns (preliminary information) Very Low Power Consumption – Active: 595 mW per byte (Max) @ 20 ns(1), 415mW per byte (Max) @ 50ns(2) – Standby: 15 mW (Typ) Military Temperature Range: -55 to +125°C TTL-Compatible Inputs and Outputs Asynchronous Die manufactured on Atmel 0.25 µm Radiation Hardened Process No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm2 Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019 ESD Better than 2000V Quality Grades: – QML-Q or V with SMD 5962-06229 – ESCC 950 Mils Wide MQFP 68 Package Mass : 8.5 grams 1. For AT68166FT-20 only. 540mW for AT68166FT-25. 2. For AT68166FT-20 only. 450mW for AT68166FT-25. Rad Hard 16 MegaBit 3.3V 5V Tolerant SRAM MultiChip Module AT68166FT Notes: Description The AT68166FT is a 16Mbit SRAM packaged in a hermetic Multi Chip Module (MCM) for space applications. The AT68166FT MCM incorporates four 4Mbit AT60142FT SRAM dice. It can be organized as either one bank of 512Kx8, two banks of 512Kx16 or four banks of 512Kx8. It combines rad-hard capabilities, a latch-up threshold of 80MeV.cm²/mg, a Multiple Bit Upset immunity and a total dose tolerance of 300Krads, with a fast access time. The MCM packaging technology allows a reduction of the PCB area by 50% with a weight savings of 75% compared to four 4Mbit packages. Thanks to the small size of the 4Mbit SRAM die, Atmel has been able to accommodate the assembly of the four dice on one side of the package which facilitates the power dissipation. The compatibility with other products allows designers to easily migrate to the Atmel AT68166FT memory. The AT68166FT is powered at 3.3V and is 5V tolerant. The AT68166FT is processed according to the test methods of the latest revision of the MIL-PRF-38535 or the ESCC 9000. 7531G–AERO–07/07 Block Diagram www.DataSheet4U.com Figure 1. AT68166FT Block Diagram CS3 WE3 CS2 WE2 CS1 WE1 CS0 WE0 A[18:0] OE BANK3 512k x 8 BANK2 512k x 8 BANK1 512k x 8 BANK0 512k x 8 I/O[31:24] or I/O2[31:16] or I/O3[7:0] I/O[23:16] or I/O2[15:0] or I/O2[7:0] I/O[15:8] or I/O1[31:16] or I/O1[7:0] I/O[7:0] or I/O1[15:0] or I/O[7:0] Figure 2. 512K x 8 Banks Block Diagram (AT60142FT) A0 A10 I/Ox0 I/Ox7 CSx WEx OE Packages AT68166FT is packed in MQFP68. Access Times 25 ns AT68166FT YM 20 ns YS 18 ns YS The pin assignment depends on the access time. There are 2 versions: – – YM package where 3 pins are not connected. YS package where the 3 above pins are connected to GND or VCC. 2 AT68166FT 7531G–AERO–07/07 AT68166FT Pin www.DataSheet4U.com Configuration Table 1. AT68166FT pin assignment in YS package Lead 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Note: Signal I/O0[0] I/O0[1] I/O0[2] I/O0[3] I/O0[4] I/O0[5] I/O0[6] I/O0[7] GND I/O1[0] I/O1[1] I/O1[2] I/O1[3] I/O1[4] I/O1[5] I/O1[6] I/O1[7] Lead 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Signal VCC A11 A12 A13 A14 A15 A16 CS0 OE CS1 A17 WE1 WE2 WE3 A18 GND VCC Lead 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 Signal I/O3[7] I/O3[6] I/O3[5] I/O3[4] I/O3[3] I/O3[2] I/O3[1] I/O3[0] GND I/O2[7] I/O2[6] I/O2[5] I/O2[4] I/O2[3] I/O2[2] I/O2[1] I/O2[0] Lead 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 Signal VCC A10 A9 A8 A7 A6 WE0 CS3 GND CS2 A5 A4 A3 A2 A1 A0 VCC In YM package leads 33, 34 and 68 are not connected. 3 7531G–AERO–07/07 Figure 3. AT68166FT pin assignment in YM package NC A0 A1 A2 A3 A4 A5 CS2 GND CS3 WE0 A6 A7 A8 A9 A10 VCC I/O0[0] I/O0[1] I/O0[2] I/O0[3] I/O0[4] I/O0[5] I/O0[6] I/O0[7] GND I/O1[0] I/O1[1] I/O1[2] I/O1[3] I/O1[4] I/O1[5] I/O1[6] I/O1[7] 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 www.DataSheet4U.com Figure 4. AT68166FT pin assignment in YS package VCC A0 A1 A2 A3 A4 A5 CS2 GND CS3 WE0 A6 A7 A8 A9 A10 VCC 4 AT68166FT 7531G–AERO–07/07 VCC A11 A12 A13 A14 A15 A16 CS0 0E CS1 A17 WE1 WE2 WE3 A18 GND VCC 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 I/O0[0] I/O0[1] I/O0[2] I/O0[3] I/O0[4] I/O0[5] I/O0[6] I/O0[7] GND I/O1[0] I/O1[1] I/O1[2] I/O1[3] I/O1[4] I/O1[5] I/O1[6] I/O1[7] 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 VCC A11 A12 A13 A14 A15 A16 CS0 0E CS1 A17 WE1 WE2 WE3 A18 NC NC 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 AT68166FT (top view) 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 I/O2[0] I/O2[1] I/O2[2] I/O2[3] I/O2[4] I/O2[5] I/O2[6] I/O2[7] GND I/O3[0] I/O3[1] I/O3[2] I/O3[3] I/O3[4] I/O3[5] I/O3[6] I/O3[7] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 AT68166FT (top view) 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 I/O2[0] I/O2[1] I/O2[2] I/O2[3] I/O2[4] I/O2[5] I/O2[6] I/O2[7] GND I/O3[0] I/O3[1] I/O3[2] I/O3[3] I/O3[4] I/O3[5] I/O3[6] I/O3[7] AT68166FT Pin Description www.DataSheet4U.com Table 2. Pin Names Name A0 - A18 I/O0 -.


AT68166G AT68166FT AT69170E


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)