ADECB1608 DIMM Datasheet

ADECB1608 Datasheet, PDF, Equivalent


Part Number

ADECB1608

Description

DDR SDRAM 200pin DIMM

Manufacture

A-Data Technology

Total Page 9 Pages
Datasheet
Download ADECB1608 Datasheet


ADECB1608
A-Data
Revision History
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Revision 1 ( Dec. 2001 )
1.Fister release.
Revision 2 ( Apr. 2002 )
1. Changed module current specification.
2. Add Performance range.
3. Changed AC Characteristics.
4. Changed typo size on module PCB in package dimensions.
ADECB1608
Rev 2 Apr. 2002
1

ADECB1608
A-Data
ADECB1608
DDR SDRAM 200pin DIMM
www.DataSheet4U.com
16Mx64bits DDR SDRAM 200pin SODIMM based on 16Mx8
General Description
Features
The ADECB1608 is 16Mx64 bits Double Data Rate
DLL aligns DQ and DQS transition with CK
SDRAM Modules, The modules are composed of
eight 16Mx8 bits CMOS Double Data Rate SDRAMs
in TSOP-II 400mil 66pin package and one 2Kbit
EEPROM in 8pin TSSOP(TSOP) package on a
transition
Double-data-rate architecture.
Bi-directional data strobe (DQS)
Differential clock inputs(CK and /CK)
200pin glass–epoxy printed circuit board.
The A-Data is a Dual In-line Memory Module and is
intended for mounting onto 200-pins edge connector
sockets. Synchronous design allows precise cycle
control with the use of system clock. Data I/O
transactions are possible on both edges of DQS.
Auto refresh and self refresh
4096 refresh cycles / 64ms
Power supply: Vdd,Vddq:2.5V±0.2V
Programmable Burst length (2,4,8)
Serial Presence Detect with EEPROM
Module bank : one physical bank
Range of operating frequencies, programmable
PCB : SO200RCB,Height (12.5mm),single
latencies and burst lengths allow the same device to
sided component, Six layers
be useful for a variety of high bandwidth, high
performance memory system applications.
Performance range
Part No.
Max Freq.
Interface
ADECB1608-75B
133MHz (7.5ns /CL=2.5)
SSTL_2
Pin Assignment
FRONT SIDE
BACK SIDE
PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME
1 VREF 26 DM1 51 VSS 76 VSS 101 A9 126 VSS 151 DQ42 176 DQ55
2 VREF 27 VSS 52 VSS 77 DQS8 102 A8 127 DQ32 152 DQ46 177 DQ56
3 VSS 28 VSS 53 DQ19 78 DM8 103 VSS 128 DQ36 153 DQ43 178 DQ60
4 VSS 29 DQ10 54 DQ23 79 CB2 104 VSS 129 DQ33 154 DQ47 179 VDD
5 DQ0 30 DQ14 55 DQ24 80 CB6 105 A7 130 DQ37 155 VDD 180 VDD
6 DQ4 31 DQ11 56 DQ28 81 VDD 106 A6 131 VDD 156 VDD 181 DQ57
7 DQ1 32 DQ15 57 VDD 82 VDD 107 A5 132 VDD 157 VDD 182 DQ61
8 DQ5 33 VDD 58 VDD 83 VBS3 108 A4 133 DQS4 158 /CK1 183 DQS7
9 VDD 34 VDD 59 DQ25 84 CB7 109 A3 134 DM4 159 VSS 184 DM7
10 VDD 35 CK0 60 DQ29 85 DU 110 A2 135 DQ34 160 CK1 185 VSS
11 DQS0 36 VDD 61 DQS3 86 DU 111 A1 136 DQ38 161 VSS 186 VSS
12 DM0 37 /CK0 62 DM3 87 VSS 112 A0 137 VSS 162 VSS 187 DQ58
13 DQ2 38 VSS 63 VSS 88 VSS 113 VDD 138 VSS 163 DQ48 188 DQ62
14 DQ6 39 VSS 64 VSS 89 CK2 114 VDD 139 DQ35 164 DQ52 189 DQ59
15 VSS 40 VSS 65 DQ26 90 VSS 115 A10 140 DQ39 165 DQ49 190 DQ63
16 VSS 41 DQ16 66 DQ30 91 /CK2 116 BA1 141 DQ40 166 DQ53 191 VDD
17 DQ3 42 DQ20 67 DQ27 92 VDD 117 BA0 142 DQ44 167 VDD 192 VDD
18 DQ7 43 DQ17 68 DQ31 93 VDD 118 /RAS 143 VDD 168 VDD 193 SDA
19 DQ8 44 DQ21 69 VDD 94 VDD 119 /WE 144 VDD 169 DQS6 194 SA0
20 DQ12 45 VDD 70 VDD 95 CKE1 120 /CAS 145 DQ41 170 DM6 195 SCL
21 VDD 46 VDD 71 CB0 96 CKE0 121 /S0 146 DQ45 171 DQ50 196 SA1
22 VDD 47 DQS2 72 CB4 97 DU 122 /S1 147 DQS5 172 DQ54 197 VDDS
23 DQ9 48 DM2 73 CB3 98 DU 123 DU 148 DM5 173 VSS 198 SA2
24 DQ13 49 DQ18 74 CB5 99 A12 124 DU 149 VSS 174 VSS 199 VDDI
25 DQS1 50 DQ22 75 VSS 100 A11 125 VSS 150 VSS 175 DQ51 200 DU
Rev 2 Apr. 2002
2


Features A-Data www.DataSheet4U.com ADECB1608 R evision History Revision 1 ( Dec. 2001 ) 1.Fister release. Revision 2 ( Apr. 2002 ) 1. Changed module current specif ication. 2. Add Performance range. 3. C hanged AC Characteristics. 4. Changed t ypo size on module PCB in package dimen sions. Rev 2 Apr. 2002 1 A-Data www. DataSheet4U.com ADECB1608 DDR SDRAM 2 00pin DIMM 16Mx64bits DDR SDRAM 200pin SODIMM based on 16Mx8 General Descript ion The ADECB1608 is 16Mx64 bits Double Data Rate SDRAM Modules, The modules a re composed of eight 16Mx8 bits CMOS Do uble Data Rate SDRAMs in TSOP-II 400mil 66pin package and one 2Kbit EEPROM in 8pin TSSOP(TSOP) package on a 200pin gl ass–epoxy printed circuit board. The A-Data is a Dual In-line Memory Module and is intended for mounting onto 200-p ins edge connector sockets. Synchronous design allows precise cycle control wi th the use of system clock. Data I/O tr ansactions are possible on both edges o f DQS. Range of operating frequencies, programmable latencies and.
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