PLL520-70

Preliminary www.DataSheet4U.com PLL520-70 CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal) DIE CONFIGURATION 65 mil (1550,1475) 19 18 17 16 25 26 24 23 22 21 20 FEATURES 45MHz to 90MHz Fundamental Mode Crystal. Output range: 45MHz – 90MHz (no PLL). CMOS outputs. Integrated variable capacitors. Supports 3.3V-Power Supply. Available in die form. Thickness 10 mil. 27 15 28 14 62 mil 13 29 12 11 30 DESCRIPTIONS 31 10 9 1 2 3 4 5 6 7 8 PLL520-70 is a VCXO IC specifically designed to pull frequency fundamental crystals from 45MHz to 90MHz, with CMOS outputs. Its design was optimized to tolerate higher limits of interelectrodes capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. Its internal varicaps allow an on chip frequency pulling, controlled by the VCON input. Y X (0,0) DIE SPECIFICATIONS Name Size Reverse side Pad dimensions Thickness Value 62 x 65 mil GND 80 micron x 80 micron 10 mil BLOCK DIAGRAM OE DRIVE_SEL AND OE_CTRL TABLE VCON Oscillator Amplifier w/ X+ integrated varicaps XQ Pad #19 DRIVE_SEL 0 1 Pad #30 OE_CTRL 0 1 Output Drive High Drive CMOS Standard CMOS (default) State Tri-state Output enabled (default) PLL520-70 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 8/26/02 Page 1 Preliminary www.DataSheet4U.com PLL520-70 CMOS Low Phase Noise VCXO (for 45-90MHz Fund Xtal) ELECTRICAL SPECIFICATIONS 1. Abs...