Document
MX23J25640
www.DataSheet4U.com
256M-BIT NAND INTERFACE XtraROMTM
FEATURES
• Word organization - (33,554,432 + 2,097,152Note) by 8 bits • Page size - (512 + 16Note) by 8 bits • Block size - (16,384 + 512Note) by 8 bits Note : Underlined parts are redundancy and fixed to all FFH. • Operation mode - READ mode (1), READ mode (2), READ mode (3), RESET • Operating supply voltage : VCC = 2.7~3.6V • Access Time - Memory cell array to starting address : 7 us (MAX.) - Read cycle time : 50 ns (MAX.) - RE access time : 35 ns (MAX.) • Operating supply current - During read : 30 mA (MAX.) (50 ns cycle operation) - During standby (CMOS) : 40 uA (MAX.) • Package Type - 48-pin TSOP(I) (12mmx20mm) • XtraROM TM: factory pre-programmed ROM with Macronix NBitTM technology, supporting short TAT • Process - 0.15um
PIN CONFIGURATIONS 48 TSOP
NC NC NC NC NC GND RB RE CE NC NC VCC VSS NC NC CLE ALE WE NC NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC NC NC I/O7 I/O6 I/O5 I/O4 NC NC NC VCC GND NC NC NC I/O3 I/O2 I/O1 I/O0 NC NC NC NC
PIN DESCRIPTION
SYMBOL I/O0~I/O7 CLE ALE WE RE CE RB VCC NC GND PIN NAME Address Input/Command Inputs/ Data Outputs Command Latch Enable Address Latch Enable Write Enable Read Enable Chip Enable READY, /BUSY pin Supply Voltage No Connection Ground
MX23J25640 (Normal Type)
ORDER INFORMATION
Part No. MX23J25640TC-50G MX23J25640TC-50 MX23J25640TI-50G Package 48 pin TSOP (Pb-free, RoHS) 48 pin TSOP 48 pin TSOP (Pb-free, RoHS) Grade Commercial Commercial Industrial
P/N:PM1137
REV. 1.2, OCT. 28, 2005
1
MX23J25640
www.DataSheet4U.com
BLOCK DIAGRAM
Data Register Circuit
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7
Input/Output Buffer
Sense Amplifier Address Register Y-Selector Command Register
CE
Control Logic
X-Decoder
Memory Cell Matrix
CLE ALE WE RE
READ Contorol Circuit
READY/BUSY Control Circuit
VCC RB (Open-drain)
P/N:PM1137
REV. 1.2, OCT. 28, 2005
2
MX23J25640
www.DataSheet4U.com
MEMORY MAP
1 Page=528 Bytes 0 0 1 2 1 Block =32 Pages . . 30 31 . . . . . . . . . 65,533 65,534 65,535 . . . 255 256 . . . 511 . 527
(A)
(B)
(C)
2,048 Blocks =65,536 Pages
512 Bytes (Main memory)
16 Bytes (Redundancy)
•
The start address (SA) during read operation is specified divided into three areas using three types of read commands. - In read mode (1), start address (SA) is set in area (A). - In read mode (2), start address (SA) is set in area (B). - In read mode (3), start address (SA) is set in area (C).
One page consists of a total of 528 bytes broken down into 512 bytes (main memory) and 16 bytes (redundancy). One block consists of 32 pages.
Caution The data of area (C) is redundancy, which is not programmable and is fixed to all FFH.
P/N:PM1137
REV. 1.2, OCT. 28, 2005
3
MX23J25640
www.DataSheet4U.com
Operation Modes
Command input, address input, and serial read are all performed from I/O pins, and the respective statuse.