A62S6316H

A62S6316H www.DataSheet4U.com Preliminary Document Title 64K X 16 BIT LOW VOLTAGE CMOS SRAM 64K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 History Initial issue Issue Date March 30, 2000 Remark Preliminary PRELIMINARY (March, 2000, Version 0.0) AMIC Technology, Inc. A62S6316H www.DataSheet4U.com Preliminary Features n Operating voltage: 2.7V to 3.3V n Access times: 70ns (max.) n Current: A62S6316H: Operating: 50mA (max.) Standby: 15µA (max.) 64K X 16 BIT LOW VOLTAGE CMOS SRAM n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min.) General Description The A62S6316H is a low operating current 1,048,576-bit static random access memory organized as 65,536 words by 16 bits and operates on low power supply voltage from 2.7V to 3.3V. It is built using AMIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Block Diagram A0 512 X 2048 DECODER A14 A15 MEMORY ARRAY VCC GND I/O 0 INPUT DATA CIRCUIT I/O 7 COLUMN I/O I/O8 INPUT DATA CIRCUIT I/O15 CE LB HB OE WE CONTROL CIRCUIT PRELIMINARY (March, 2000, Versi...