DatasheetsPDF.com

ATXMEGA128A3 Dataheets PDF



Part Number ATXMEGA128A3
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description (ATXMEGAxxxA3) 8/16-bit XMEGA A3 Microcontroller
Datasheet ATXMEGA128A3 DatasheetATXMEGA128A3 Datasheet (PDF)

Features www.DataSheet4U.com • High-performance, Low-power AVR 8/16-bit XMEGA Microcontroller • Non-volatile Program and Data Memories • • • • • – 64K - 256K Bytes of In-System Self-Programmable Flash – 4K - 8K Boot Code Section with Independent Lock Bits – 2K - 4K Bytes EEPROM – 4K - 16K Bytes Internal SRAM Peripheral Features – Four-channel DMA Controller with support for external requests – Eight-channel Event System – Seven 16-bit Timer/Counters Four Timer/Counters with 4 Output Compare.

  ATXMEGA128A3   ATXMEGA128A3


Document
Features www.DataSheet4U.com • High-performance, Low-power AVR 8/16-bit XMEGA Microcontroller • Non-volatile Program and Data Memories • • • • • – 64K - 256K Bytes of In-System Self-Programmable Flash – 4K - 8K Boot Code Section with Independent Lock Bits – 2K - 4K Bytes EEPROM – 4K - 16K Bytes Internal SRAM Peripheral Features – Four-channel DMA Controller with support for external requests – Eight-channel Event System – Seven 16-bit Timer/Counters Four Timer/Counters with 4 Output Compare or Input Capture channels Three Timer/Counters with 2 Output Compare or Input Capture channels High Resolution Extensions on all Timer/Counters Advanced Waveform Extension on one Timer/Counter – Seven USARTs IrDA Extension on 1 USART – AES and DES Crypto Engine – Two Two-wire Interfaces with dual address match(I2C and SMBus compatible) – Three SPI (Serial Peripheral Interfaces) – 16-bit Real Time Counter with Separate Oscillator – Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters – One Two-channel, 12-bit, 1 Msps Digital to Analog Converter – Four Analog Comparators with Window compare function – External Interrupts on all General Purpose I/O pins – Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator Special Microcontroller Features – Power-on Reset and Programmable Brown-out Detection – Internal and External Clock Options with PLL – Programmable Multi-level Interrupt Controller – Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby – Advanced Programming, Test and Debugging Interfaces JTAG (IEEE 1149.1 Compliant) Interface for test, debug and programming PDI (Program and Debug Interface) for programming, test and debugging I/O and Packages – 50 Programmable I/O Lines – 64-lead TQFP – 64-pad MLF Operating Voltage – 1.6 – 3.6V Speed performance – 0 – 12 MHz @ 1.6 – 3.6V – 0 – 32 MHz @ 2.7 – 3.6V 8/16-bit XMEGA A3 Microcontroller ATxmega256A3 ATxmega192A3 ATxmega128A3 ATxmega64A3 Preliminary Typical Applications • • • • • Industrial control Factory automation Building control Board control White Goods • • • • • Climate control ZigBee Motor control Networking Optical • • • • • Hand-held battery applications Power tools HVAC Metering Medical Applications 8068E–AVR–08/08 XMEGA A3 1. www.DataSheet4U.com Ordering Information Ordering Code ATxmega256A3-AU ATxmega192A3-AU ATxmega128A3-AU ATxmega64A3-AU ATxmega256A3-MU ATxmega192A3-MU ATxmega128A3-MU ATxmega64A3-MU Notes: 1. 2. 3. Flash (B) 256K + 8K 192K + 8K 128K + 8K 64K + 4K 256K + 8K 192K + 8K 128K + 8K 64K + 4K E2 (B) 4K 4K 2K 2K 4K 4K 2K 2K SRAM (B) 16K 16K 8K 4K 16K 16K 8K 4K Speed (MHz) 32 32 32 32 32 32 32 32 Power Supply 1.6 - 3.6V 1.6 - 3.6V 1.6 - 3.6V 1.6 - 3.6V 1.6 - 3.6V 1.6 - 3.6V 1.6 - 3.6V 1.6 - 3.6V Package(1)(2)(3) Temp 64A -40⋅ - 85⋅C 64M1 This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green. For packaging information, see ”Packaging information” on page 66. Package Type 64A 64M1 64-lead, 14 x 14 mm Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 64-pad, 9 x 9 x 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) 2. Pinout/Block Diagram Figure 2-1. Block diagram and TQFP-pinout. PA2 PA1 PA0 AVCC GND PR1 PR0 RESET/PDI_CLK PDI_DATA PF7 PF6 VCC GND PF5 PF4 PF3 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 INDEX CORNER PA3 PA4 PA5 PA6 PA7 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 GND VCC PC0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Port R DATA BU S ADC A OSC/CLK Control Port A BOD TEMP VREF RTC POR OCD AC A0 Power Control AC A1 ADC B FLASH CPU RAM E2PROM Port B DAC B AC B0 Reset Control DMA Interrupt Controller Watchdog Event System ctrl DATA BU S EVENT ROUTING NETWORK AC B1 Port C Port D Port E Port F PF2 PF1 PF0 VCC GND PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0 VCC GND PD7 USART0:1 USART0:1 USART0:1 T/C0:1 Note: 1. For full details on pinout and alternate pin functions refer to ”Pinout and Pin Functions” on page 48. PC1 PC2 PC3 PC4 PC5 PC6 PC7 GND VCC PD0 PD1 PD2 PD3 PD4 PD5 PD6 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 SPI USART0 T/C0:1 T/C0:1 T/C0 TWI TWI SPI SPI 2 8068E–AVR–08/08 XMEGA A3 3. www.DataSheet4U.com Overview The XMEGA A3 is a family of low power, high performance and peripheral rich CMOS 8/16-bit microcontrollers based on the AVR ® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the XMEGA A3 achieves throughputs approaching 1 Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the 32 regist.


KOE1007 ATXMEGA128A3 ATXMEGA256A3


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)