PBL3799

PBL April3799 1997 www.DataSheet4U.com PBL 3799, PBL 3799/2 Subscriber Line Interface Circuit Description PBL 3799 is an analog Subscriber Line Interface Circuit (SLIC), which is fabricated in a 75 V bipolar, monolithic process. The programmable, resistive feed circuit incorporates a switch mode regulator to minimize on-chip power dissipation. A stand-by state further reduces idle power dissipation, while allowing the supervisory functions to be active. Tip-ring polarity is reversible without altering SLIC supervisory and voice frequency (vf) functions. Tip and ring outputs can be set to high impedance states. These and other operating states are activated via a parallel, four bit control word. An external resistor controls the off-hook detector threshold current. A ground key detector with internal reference reports tip/ring dc current unbalance. The ring trip detector can operate with both balanced and unbalanced ringing systems. The three detectors are read via a shared output. Ring and test relay drivers with internal clamp diodes are provided. The complex or real two-wire impedance is set by a scaled, lumped element network. Two- to four-wire and four- to two-wire signal conversion is provided by the SLIC in conjunction with either a conventional or a programmable CODEC/filter. Longitudinal line voltages are suppressed by a control loop within the SLIC. The PBL 3799 package is 28-pin, dual-in-line; 32-pin or 44-pin, j-leaded chip carrier. The difference between PBL 379...