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RMWB04001 Dataheets PDF



Part Number RMWB04001
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description 4 GHZ Buffer Amp
Datasheet RMWB04001 DatasheetRMWB04001 Datasheet (PDF)

RMWB04001 www.DataSheet4U.com June 2004 RMWB04001 4 GHz Buffer Amplifier MMIC General Description The RMWB04001 is a 2-stage GaAs MMIC amplifier designed as a 3.5 to 4 GHz Buffer Amplifier for use in point to point and point to multi-point radios, and various communications applications. In conjunction with other amplifiers, multipliers and mixers it forms part of a complete 23 and 26 GHz transmit/receive chipset. The RMWB04001 utilizes our 0.25µm power PHEMT process and can be used in a vari.

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RMWB04001 www.DataSheet4U.com June 2004 RMWB04001 4 GHz Buffer Amplifier MMIC General Description The RMWB04001 is a 2-stage GaAs MMIC amplifier designed as a 3.5 to 4 GHz Buffer Amplifier for use in point to point and point to multi-point radios, and various communications applications. In conjunction with other amplifiers, multipliers and mixers it forms part of a complete 23 and 26 GHz transmit/receive chipset. The RMWB04001 utilizes our 0.25µm power PHEMT process and can be used in a variety of applications requiring a high gain medium power amplifier. Features • 4 mil substrate • Small-signal gain 27dB (typ.) • Saturated Power Out 20dBm (typ.) • Voltage Detector Included to Monitor Pout • Chip size 2.4mm x 1.3mm x 100µm Device Absolute Ratings Symbol Vd Vg Vdg ID PIN TC TSTG RJC Parameter Positive DC Voltage (+4V Typical) Negative DC Voltage Simultaneous (Vd–Vg) Positive DC Current RF Input Power (from 50Ω source) Operating Baseplate Temperature Storage Temperature Range Thermal Resistance (Channel to Backside) Ratings +6 -2 8 168 +7 -30 to +85 -55 to +125 140 Units V V V mA dBm °C °C °C/W ©2004 Fairchild Semiconductor Corporation RMWB04001 Rev. C RMWB04001 Electrical www.DataSheet4U.com Characteristics (At 25°C), 50Ω system, Vd = +4V, Quiescent Current (Idq) = 36mA Min 3.5 24 18 Typ -0.7 27 0.5 20 14 12 0.5 Max 4.0 Units GHz V dB dB dBm dB dB V Parameter Frequency Range Gate Supply Voltage1 (Vg) Gain (Small Signal at Pin = -12dBm) Gain Variation vs. Frequency Power Output Saturated: (Pin = -2dBm) Input Return Loss (Pin = -12dBm) Output Return Loss (Pin = -12dBm) DC Detector Voltage at Pout = 20dBm Note: 1: Typical range of gate voltage is -1 to -0.4V to set typical Idq of 36mA. Functional Block Diagram1 DRAIN SUPPLY Vd1 DRAIN SUPPLY Vd2 OUTPUT POWER DETECTOR VOLTAGE Vdet MMIC CHIP RF IN RF OUT GROUND (Back of Chip) GATE SUPPLY Vg Note: 1: Detector delivers > 0.1V DC into 3kΩ load resistor for > 20dBm output power. If output power level detection is not desired, do not make connection to detector bond pad. ©2004 Fairchild Semiconductor Corporation RMWB04001 Rev. C RMWB04001 Application www.DataSheet4U.com Information CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with gold over nickel and should be capable of withstanding 325°C for 15 minutes. Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground. These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges through the device. Recommended wire bonding uses 3mils wide and 0.5mil thick gold ribbon with lengths as short as practical allowing for appropriate stress relief. The RF input and output bonds should be typically 12 mils long corresponding to a typical 2 mil gap between the chip and the substrate material. 0.00 1.30 1.19 0.57 1.32 2.08 2.28 2.40 1.30 1.19 0.57 0.57 0.11 0.00 0.00 0.11 Dimensions in mm 1.14 2.28 2.40 0.11 0.00 Figure 1. Chip Layout and Bond Pad Locations Chip Size is 2.40mm x 1.3mm X 100µm. Back of chip is RF and DC Ground. ©2004 Fairchild Semiconductor Corporation RMWB04001 Rev. C RMWB04001 www.DataSheet4U.com Output Power Detector Voltage Vdet 10,000 pF 3 kΩ L 100 pF L MMIC CHIP L 100 pF L L 100 pF Drain Supply Vd=4 V L = Bond Wires RF IN RF OUT L 100 pF Ground (Back of Chip) L 10,000 pF Gate Supply Vg Note: Detector delivers > 0.1V DC into 3kΩ load resistor for >20 dBm output power. If output power level detection is not desired, do not connect to detector bond pad. Figure 2. Recommended Application Schematic Circuit Diagram 10,000pF Die-Attach 80Au/20Sn 100pF 100pF 5mil Thick Alumina 50-Ohm RF Input Drain Supply Vd= 4 3kΩ Output Power Detector Voltage Vdet 100pF 5 mil Thick Alumina 50-Ohm RF Output 100pF 10,000pF 2 mil Gap Gate Supply Vg L< 0.015" (2 Places) Note: Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief. Figure 3. Recommended Assembly Diagram ©2004 Fairchild Semiconductor Corporation RMWB04001 Rev. C RMWB04001 Recommended www.DataSheet4U.com Procedure for Biasing and Operation Step 3: Slowly apply positive drain bias supply voltage of +4V to Vd. Step 4: Adjust gate bias voltage to set the quiescent current of Idq = 36mA. Step 5: After the bias condition is established, the RF input signal may now be applied at.


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