SAE81C54

www.DataSheet4U.com CMOS RAM SAE 81C54 Preliminary DataACMOS IC Features q q q q q q q q q q 512 x 8 bit-organization Multiplexed address and data bus Tristate address and data lines On-chip address register Very low current consumption: 1 µA at 5.5 V during standby Dual chip selection Wide supply voltage range from 2.5 V to 5.5 V Fully compatible 5 V ± 10 % Data retention up to 1.0 V Temperature range – 40 to 110 °C P-DIP-16-1 Type SAE 81C54 P Ordering Code Q67100-H8486 Package P-DIP-16-1 The SAE 81C54 P is a static 4096-bit RAM (512 words by 8 bits) in Advanced CMOS technology. The address and data bus in the multiplex operation allows directly interfaces to 8-bit microprocessors/microcontroller families, e.g. SAB 8086, SAB 8088, SAB 8051. Due to its low power dissipation of less than 1 µA in standby mode this component requires only minimum supply current. Semiconductor Group 1 09.94 SAE 81C54 www.DataSheet4U.com Pin Configurations (top view) Pin Definitions and Functions Pin No. 1-7, 10 8 9 11 12 13 14 15 16 Symbol AD0-7 Function Address/data lines Ground Chip select Address line Chip select Address signal latch enable Write enable Read enable Supply voltage VSS CS A8 CS ALE WR RD VDD Semiconductor Group 2 SAE 81C54 www.DataSheet4U.com Logic Symbol Truth Table for Control and Data Bus Pin Status CS H X L L CS X L H H RD X X L H WR X X H L AD0-7 During Data Phase Floating Floating Data from memory Data to memory Function None None Read Write Semicond...