92CD54IF

www.datasheet4u.com TMP92CD54I CMOS 32-bit Micro-controller TMP92CD54IF 1. Outline and Device Characteristics TMP92CD54I is high-speed advanced 32-bit micro-controller developed for controlling equipment which processes mass data. TMP92CD54I is a micro-controller which has a high-performance CPU (900/H1 CPU) and various built-in I/Os. TMP92CD54I is housed in a 100-pin mini flat package. Device characteristics are as follows: (1) CPU : 32-bit CPU(900/H1 CPU) Compatible with TLCS-900,900/L,900/L1,900/H,900/H2’s instruction code 16Mbytes of linear address space General-purpose register and register banks Micro DMA : 8channels (250ns / 4bytes at fc = 20MHz, best case) Minimum instruction execution time : 50ns(at 20MHz) Internal data bus : 32-bit Internal memory Internal RAM : 32K-byte Internal ROM : 512K-byte Mask ROM (2) 92CD54I-1 2006-01-27 www.datasheet4u.com TMP92CD54I (3) (4) (5) External memory expansion 16M-byte linear address space (memory mapped I/O) External data bus : 8bit(for external I/O expansion) * Can’t use upper address bus when built-in I/Os are selected Memory controller (MEMC) Chip select output : 1 channel 8-bit timer : 8 channels 8-bit interval timer mode (8 channels) 16-bit interval timer mode (4 channels) 8-bit programmable pulse generation (PPG) output mode (4 channels) 8-bit pulse width modulation (PWM) output mode (4 channels) 16-bit timer : 2 channels 16-bit interval timer mode 16-bit event counter mode 16-bit programmable pulse generation (P...