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IRS2133 Dataheets PDF



Part Number IRS2133
Manufacturers International Rectifier
Logo International Rectifier
Description (IRS2133 / IRS2135) 3-PHASE BRIDGE DRIVER
Datasheet IRS2133 DatasheetIRS2133 Datasheet (PDF)

www.datasheet4u.com PRELIMINARY Data Sheet No. PD60275 revA IRS2133/IRS2135 (J&S)PbF 3-PHASE BRIDGE DRIVER Features • • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V /12 V to 20 V DC and up to 25 V for transient Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Three Independent half-bridge drivers Matched propagation dela.

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www.datasheet4u.com PRELIMINARY Data Sheet No. PD60275 revA IRS2133/IRS2135 (J&S)PbF 3-PHASE BRIDGE DRIVER Features • • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V /12 V to 20 V DC and up to 25 V for transient Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Three Independent half-bridge drivers Matched propagation delay for all channels 2.5 V logic compatible Outputs out of phase with inputs All parts are LEAD-FREE Product Summary VOFFSET IO+/- (min.) VOUT ton/off (typ.) Deadtime (typ.) 600 V max. 200 mA / 420 mA 10 V – 20 V or 12 – 20 V 500 ns 230 ns Applications: *Motor Control *Air Conditioners/ Washing Machines *General Purpose Inverters *Micro/Mini Inverter Drives Description Packages The IRS213(3, 5) are high voltage, high speed power MOSFET and IGBT drivers with three independent high and low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 2.5 V logic. An independent operational amplifier provides analog feedback of bridge 28-Lead SOIC 28-Lead PDIP current via an external current sense resistor. A current trip function which terminates all six outputs can also derived from this resistor. A shutdown function is available to terminate all six outputs. An open drain FAULT signal is provided to indicate that an over-current or undervoltage shutdown has occurred. Fault conditions are cleared with the FLT-CLR lead. 44-Lead PLCC w/o 12 Leads The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequencies applications. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 V. Typical Connection Absolute Maximum Ratings Absolute Maximum Ratings www.irf.com 1 www.datasheet4u.com IRS2133/IRS2135 (J&S)PbF PRELIMINARY Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Zener clamps are included between VCC & COM (25 V), VCC & VSS (20V), and VBx & VSx (20 V). Symbol VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 VIN VIN,AMP VOUT,AMP VFLT dVS/dt PD Definition High side floating supply voltage High side floating offset voltage High side floating output voltage Fixed supply voltage Logic ground Low side output voltage Logic input voltage ( HIN, LIN ITRIP, SD & FLT-CLR) Operational amplifier input voltage (CA+ & CA-) Operational amplifier output voltage (CAO) FAULT output voltage Allowable offset supply voltage transient (28 lead PDIP) Package power dissipation @ TA ≤ +25 °C (28 lead SOIC) (44 lead PLCC) (28 lead PDIP) Min. -0.3 VB1,2,3 - 20 VS1,2,3 - 0.3 -0.3 VCC - 20 -0.3 VSS -0.3 VSS -0.3 VSS -0.3 VSS -0.3 — — — — — — — — -55 — Max. 625 VB1,2,3 + 0.3 VB1,2,3 + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC +0.3 VCC +0.3 VCC +0.3 50 1.5 1.6 2.0 83 78 63 150 150 300 Units V V/ns W Rth,JA TJ TS TL Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (28 lead SOIC) (44 lead PLCC) °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltage referenced to COM. The VS offset rating is tested with all supplies biased at a 15 V differential. Symbol VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 VIN VIN,AMP VOUT,AMP VFLT Definition High side floating supply voltage High side floating offset voltage High side floating output voltage Fixed supply voltage Low side driver return Low side output voltage Logic input voltage (HIN, LIN ITRIP, SD & FLT-CLR) Operational amplifier input voltage (CA+ & CA-) Operational amplifier output voltage (CAO) FAULT output voltage Min. VS1,2,3 +10/12 Note 1 VS1,2,3 10 or 12 -5 0 VSS VSS VSS VSS Max. VS1,2,3 +20 600 VB1,2,3 20 5 VCC VSS + 5 VSS + 5 VSS + 5 VCC Units V Note 1: Logic operational for VS of (COM - 8 V) to (COM + 600 V). Logic state held for VS of (COM - 8 V) to (COM – VBS). (Please refer to the Design Tip DT97-3 for more details). Note 2: The CAO pin and all input pins (except CA+ & CA-) are internally clamped with a 5.2 V zener diode. www.irf.com 2 www.datasheet4u.com IRS2133/IRS2135 (J&S)PbF PRELIMINARY Static Electrical Characteristics VBIAS (VCC, VBS1,2,3) = 15 V, unless otherwise specified and TA = 25 °C. All static parameters other than IO and VO are referenced to VSS and are applicable to all six channels (HIN1,2.


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