Analog Keyboard Encoder
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Using MAX II CPLDs as Analog Keyboard Encoders
Application Note 426
July 2006, Version 1.0
Introd...
Description
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Using MAX II CPLDs as Analog Keyboard Encoders
Application Note 426
July 2006, Version 1.0
Introduction
Keyboard encoders are a very common application for CPLDs. Typically a processor, ASSP, or ASIC does not have enough pins for keypads or keyboards. I/O expansion is a very common function for CPLDs and allows a processor to decode a very large keyboard with very few I/Os. Even though CPLDs like MAX® and MAX® II may have abundant low-cost I/Os, decoding a keypad or keyboard with one I/O per switch is not desirable. The advantage of decoding a keyboard with fewer wires is that it reduces the number of wires going from a keypad to a main circuit board or it reduces the complexity of a switch matrix in the keyboard assembly. This application note explains how the resources of a MAX II device can be used to decode a very large number of switches in a keypad or keyboard with only two I/Os and a GND pin. The decoding approach used works for as few as 4 switches and as many as 48 switches. The most common way to encode a switch with a CPLD is by using a simple circuit that ties one end of the switch to GND and the other terminal to VCC through a pull-up resistor, typically 10 KΩ . The switch and resistor node are connected to any CPLD input pin. For a pushbutton normally-open Single Pole, Single Throw (SPST) switch, the CPLD input is normally a logic one and is a logic zero when the switch is pressed. Figure 1 shows the circuit for a simple one CPLD I/O per ...
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