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PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Rev. 01 — 5 April 2007
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Product data sheet
1. Product profile
1.1 General description
NPN/PNP double low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium power Surface-Mounted Device (SMD) plastic package.
Table 1. Product overview Package NXP PBSS4350SPN SOT96-1 Name SO8 NPN/NPN complement PBSS4350SS PNP/PNP complement PBSS5350SS
Type number
1.2 Features
I I I I I Low collector-emitter saturation voltage VCEsat High collector current capability IC and ICM High collector current gain (hFE) at high IC High efficiency due to less heat generation Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
I I I I Complementary MOSFET driver Half and full bridge motor drivers Dual low power switches (e.g. motors, fans) Automotive
1.4 Quick reference data
Table 2. Quick reference data Conditions open base single pulse; tp ≤ 1 ms IC = 2 A; IB = 200 mA
[1]
Symbol Parameter TR1; NPN low VCEsat transistor VCEO IC ICM RCEsat collector-emitter voltage collector current peak collector current collector-emitter saturation resistance
Min -
Typ 90
Max 50 2.7 5 130
Unit V A A mΩ
NXP Semiconductors
PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Quick reference data …continued Conditions open base single pulse; tp ≤ 1 ms IC = −2 A; IB = −200 mA
[1]
Table 2.
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Symbol Parameter TR2; PNP low VCEsat transistor VCEO IC ICM RCEsat collector-emitter voltage collector current peak collector current collector-emitter saturation resistance
Min -
Typ 95
Max −50 −2.7 −5 140
Unit V A A mΩ
[1]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
2. Pinning information
Table 3. Pin 1 2 3 4 5 6 7 8 Pinning Description emitter TR1 base TR1 emitter TR2
TR1 TR2
Simplified outline
8 5
Symbol
8 7 6 5
base TR2 collector TR2 collector TR2 collector TR1 collector TR1
1 4 1 2 3 4
006aaa985
3. Ordering information
Table 4. Ordering information Package Name PBSS4350SPN SO8 Description plastic small outline package; 8 leads; body width 3.9 mm Version SOT96-1 Type number
4. Marking
Table 5. Marking codes Marking code 4350SPN Type number PBSS4350SPN
PBSS4350SPN_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 5 April 2007
2 of 19
NXP Semiconductors
PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
5. Limiting values
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Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO IC ICM IB Ptot Parameter collector-base voltage collector-emitter voltage emitter-base voltage collector current peak collector current base current total power dissipation Tamb ≤ 25 °C
[1] [2] [3]
Conditions open emitter open base open collector single pulse; tp ≤ 1 ms
Min −65 −65
Max 50 50 5 2.7 5 0.5 0.55 0.87 1.43 0.75 1.2 2 150 +150 +150
Unit V V V A A A W W W W W W °C °C °C
Per transistor; for the PNP transistor with negative polarity
Per device Ptot total power dissipation Tamb ≤ 25 °C
[1] [2] [3]
Tj Tamb Tstg
[1] [2] [3]
junction temperature ambient temperature storage temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBSS4350SPN_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 5 April 2007
3 of 19
NXP Semiconductors
PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
www.datasheet4u.com
2.5 Ptot (W) 2.0
006aaa967
(1)
1.5
(2)
1.0
(3)
0.5
0 −75
−25
25
75
125 175 Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint
Fig 1. Per device: Power derating curves
PBSS4350SPN_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 5 April 2007
4 of 19
NXP Semiconductors
PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
6. Thermal characteristics
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Table 7. Symbol Rth(j-a)
Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air
[1] [2] [3]
Min -
Typ -
Max 227 144 87 40
Unit K/W K/W K/W K/W
Per transistor
Rth(j-sp) Per device Rth(j-a)
thermal resistance from junction to solder point thermal resistance from junction to ambient in free air
[1] [2] [3]
-
-
167 104 63
K/W K/W K/W
[1] [2] [3]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint.
103 Zth(j-a) (K/W) 102 duty cycle = 1.0 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 0.01 0 1
006aaa809
10−1 10−5
10−4
10−3
10−2
10−1
1
10
102 tp (s)
103
FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance fro.