PowerTrench MOSFET. FDMA1027PT Datasheet

FDMA1027PT Datasheet PDF, Equivalent


Part Number

FDMA1027PT

Description

Dual P-Channel PowerTrench MOSFET

Manufacture

Fairchild Semiconductor

Total Page 6 Pages
PDF Download
Download FDMA1027PT Datasheet


FDMA1027PT Datasheet
FDMA1027PT
September 2008
Dual P-Channel PowerTrench® MOSFET
www.datasheet4u.com
–20 V, –3 A, 120 m
tm
Features
General Description
„ Max rDS(on) = 120 mat VGS = -4.5 V, ID = -3.0 A
„ Max rDS(on) = 160 mat VGS = -2.5 V, ID = -2.5 A
„ Max rDS(on) = 240 mat VGS = -1.8 V, ID = -1.0 A
„ Low profile - 0.55 mm maximum - in the new package
MicroFET 2x2 Thin
„ RoHS Compliant
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultra-portable applications. It features two independent
P-Channel MOSFETs with low on-state resistance for minimum
conduction losses. When connected in the typical common
source configuration, bi-directional current flow is possible.
The MicroFET 2x2 Thin package offers exceptional thermal
performance for it's physical size and is well suited to linear
mode applications.
Applications
„ Battery management
„ Load switch
„ Battery protection
PIN 1 S1 G1 D2
D1 D2
S1 1
G1 2
6 D1
5 G2
D1 G2 S2
D2 3
4 S2
MicroFET 2X2 Thin
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
TA = 25 °C
Power Dissipation for Single Operation
TA = 25 °C
Power Dissipation for Single Operation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
-20
±8
-3
-6
1.4
0.7
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Ambient (Single Operation)
Thermal Resistance, Junction to Ambient (Single Operation)
Thermal Resistance, Junction to Ambient (Dual Operation)
Thermal Resistance, Junction to Ambient (Dual Operation)
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
86
173
69
151
°C/W
Device Marking
27
Device
FDMA1027PT
Package
MicroFET 2x2 Thin
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
1
www.fairchildsemi.com

FDMA1027PT Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
www.datasheet4TuJ.com
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = -250 µA, VGS = 0 V
ID = -250 µA, referenced to 25 °C
VDS = -16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
-20
V
-12 mVC
-1
±100
µA
nA
On Characteristics
VGS(th)
VGS(th)
TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Drain to Source On Resistance
ID(on)
gFS
On to State Drain Current
Forward Transconductance
VGS = VDS, ID = -250 µA
-0.4 -0.7 -1.3
V
ID = -250 µA, referenced to 25 °C 2 mV/°C
VGS = -4.5 V, ID = -3.0 A
VGS = -2.5 V, ID = -2.5 A
VGS = -1.8 V, ID = -1.0 A
VGS = -4.5 V, ID = -3.0 A ,
TJ = 125 °C
VGS = -4.5 V, VDS = -5 V
VDS = -5 V, ID = -3.0 A
90 120
120 160
172 240 m
118 160
-20
7
A
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
435 pF
80 pF
45 pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -1.0 A
VGS = -4.5 V, RGEN = 6
VDD = -10 V, ID = -3.0 A
VGS = -4.5 V
9 18 ns
11 19 ns
15 27 ns
6 12 ns
4 6 nC
0.8 nC
0.9 nC
Drain-Source Diode Characteristics
IS Maximum continuous Drain-Source Diode Forward Current
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = -1.1 A (Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = -3.0 A, di/dt = 100 A/µs
-1.1
-0.8 -1.2
17
6
A
V
ns
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 86 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
b. 173 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
2
www.fairchildsemi.com


Features Datasheet pdf FDMA1027PT Dual P-Channel PowerTrench® MOSFET September 2008 FDMA1027PT Dual P-Channel PowerTrench® MOSFET www.dat asheet4u.com –20 V, –3 A, 120 mΩ Features General Description This devic e is designed specifically as a single package solution for the battery charge switch in cellular handset and other u ltra-portable applications. It features two independent P-Channel MOSFETs with low on-state resistance for minimum co nduction losses. When connected in the typical common source configuration, bi -directional current flow is possible. The MicroFET 2x2 Thin package offers ex ceptional thermal performance for it's physical size and is well suited to lin ear mode applications. tm „ Max rDS(o n) = 120 mΩ at VGS = -4.5 V, ID = -3. 0 A „ Max rDS(on) = 160 mΩ at VGS = -2.5 V, ID = -2.5 A „ Max rDS(on) = 24 0 mΩ at VGS = -1.8 V, ID = -1.0 A „ Low profile - 0.55 mm maximum - in the new package MicroFET 2x2 Thin „ RoHS C ompliant Applications „ Battery management „ Load switch „ Battery protection PI.
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