DatasheetsPDF.com

LTC2217

Linear Technology

Low Noise ADC

FEATURES ■ Sample Rate: 105Msps ■ 81.3dBFS Noise Floor ■ 100dB SFDR ■ SFDR >90dB at 70MHz ■ 85fsRMS Jitter ■ 2.75VP-P In...


Linear Technology

LTC2217

File Download Download LTC2217 Datasheet


Description
FEATURES ■ Sample Rate: 105Msps ■ 81.3dBFS Noise Floor ■ 100dB SFDR ■ SFDR >90dB at 70MHz ■ 85fsRMS Jitter ■ 2.75VP-P Input Range ■ 400MHz Full Power Bandwidth S/H ■ Optional Internal Dither ■ Optional Data Output Randomizer ■ LVDS or CMOS Outputs ■ Single 3.3V Supply ■ Power Dissipation: 1.19W ■ Clock Duty Cycle Stabilizer ■ Pin Compatible with LTC2208 ■ 64-Pin (9mm × 9mm) QFN Package APPLICATIONS ■ Telecommunications ■ Receivers ■ Cellular Base Stations ■ Spectrum Analysis ■ Imaging Systems ■ ATE , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Patents Pending. LTC2217 16-Bit, 105Msps Low Noise ADC DESCRIPTION The LTC®2217 is a 105Msps sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is fixed at 2.75VP-P. The LTC2217 is perfect for demanding communications applications, with AC performance that includes 81.3dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specifications include ±3.5LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data ...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)