Document
Features
n 70.8dB SNR n 85dB SFDR n Low Power: 124mW/103mW/87mW n Single 1.8V Supply n CMOS, DDR CMOS or DDR LVDS Outputs n Selectable Input Ranges: 1VP-P to 2VP-P n 800MHz Full-Power Bandwidth S/H n Optional Data Output Randomizer n Optional Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Serial SPI Port for Configuration n Pin Compatible 14-Bit and 12-Bit Versions n 40-Pin (6mm × 6mm) QFN Package
Applications
n Communications n Cellular Base Stations n Software Defined Radios n Portable Medical Imaging n Multi-Channel Data Acquisition n Nondestructive Testing
LTC2261-12 LTC2260-12/LTC2259-12
12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs
Description
The LTC®2261-12/LTC2260-12/LTC2259-12 are sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.8dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.
DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.
The digital outputs can be either full-rate CMOS, doubledata rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.
The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
1.8V VDD
ANALOG INPUT
+
INPUT S/H
–
12-BIT PIPELINED ADC CORE
CORRECTION LOGIC
CLOCK/DUTY CYCLE
CONTROL
125MHz
GND
CLOCK
OUTPUT DRIVERS
1.2V TO 1.8V
OVDD
D11 • CMOS • OR • LVDS D0
OGND
226112 TA01a
For more information www.linear.com/LTC2261-12
AMPLITUDE (dBFS)
2-Tone FFT, fIN = 70MHz and 75MHz
0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120
0 10 20 30 40 50 60 FREQUENCY (MHz)
226112 TA01b
226112fc
1
LTC2261-12 LTC2260-12/LTC2259-12
Absolute Maximum Ratings (Notes 1, 2)
Supply Voltages (VDD, OVDD)........................ –0.3V to 2V Analog Input Voltage (AIN+, AIN–, PAR/SER, SENSE) (Note 3)........... –0.3V to (VDD + 0.2V) Digital Input Voltage (ENC+, ENC–, CS,
SDI, SCK) (Note 4)..................................... –0.3V to 3.9V
SDO (Note 4).............................................. –0.3V to 3.9V
Digital Output Voltage................. –0.3V to (OVDD + 0.3V) Operating Temperature Range:
LTC2261C, LTC2260C, LTC2259C............. 0°C to 70°C
LTC2261I, LTC2260I, LTC2259I............–40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Pin Configurations
FULL-RATE CMOS OUTPUT MODE TOP VIEW
DOUBLE-DATA RATE CMOS OUTPUT MODE TOP VIEW
VDD SENSE VREF VCM OF DNC D11 D10 D9 D8 VDD SENSE VREF VCM OF DNC D10_11 DNC D8_9 DNC
AIN+ 1 AIN– 2 GND 3
REFH 4
40 39 38 37 36 35 34 33 32 31
30 D7 29 D6 28 CLKOUT+ 27 CLKOUT–
REFH 5 REFL 6
41
26 OVDD
GND
25 OGND
REFL 7
24 D5
PAR/SER 8
23 D4
VDD 9 VDD 10
22 D3 21 D2
11 12 13 14 15 16 17 18 19 20
AIN+ 1 AIN– 2 GND 3
REFH 4
40 39 38 37 36 35 34 33 32 31
30 D6_7 29 DNC 28 CLKOUT+ 27 CLKOUT–
REFH 5 REFL 6
41
26 OVDD
GND
25 OGND
REFL 7
24 D4_5
PAR/SER 8
23 DNC
VDD 9 VDD 10
22 D2_3 21 DNC
11 12 13 14 15 16 17 18 19 20
ENC+ ENC–
CS SCK SDI SDO DNC DNC
D0 D1 ENC+ ENC– CS SCK SDI SDO DNC DNC DNC D0_1
UJ PACKAGE 40-LEAD (6mm × 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
UJ PACKAGE 40-LEAD (6mm × 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
DOUBLE-DATA RATE LVDS OUTPUT MODE TOP VIEW
VDD SENSE VREF VCM OF+ OF– D10_11+ D10_11– D8_9+ D8_9–
2
AIN+ 1 AIN– 2 GND 3
REFH 4
40 39 38 37 36 35 34 33 32 31 30 D6_7+ 29 D6_7– 28 CLKOUT+ 27 CLKOUT–
REFH 5 REFL 6
41
26 OVDD
GND
25 OGND
REFL 7
24 D4_5+
PAR/SER 8
23 D4_5–
VDD 9 VDD 10
22 D2_3+ 21 D2_3–
11 12 13 14 15 16 17 18 19 20
ENC+ ENC–
CS SCK SDI SDO DNC DNC D0_1– D0_1+
UJ PACKAGE 40-LEAD (6mm × 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
For more information www.linear.com/LTC2261-12
226112fc
LTC2261-12 LTC2260-12/LTC2259-12
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2261CUJ-12#PBF LTC2261CUJ-12#TRPBF LTC2261UJ-12
40-Lead (6mm × 6mm) Plastic QFN
0°C to 70°C
LTC2261IUJ-12#PBF
LTC2261IUJ-12#TRPBF
LTC2261UJ-12
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
LTC2260CUJ-12#PBF LTC2260CUJ-12#TRPBF LTC2260UJ-12
40-Lead (6mm.