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DSP56724 Dataheets PDF



Part Number DSP56724
Manufacturers Freescale Semiconductor
Logo Freescale Semiconductor
Description Multi-Core Audio Processors
Datasheet DSP56724 DatasheetDSP56724 Datasheet (PDF)

Freescale Semiconductor Data Sheet: Technical Data Document Number: DSP56724EC Rev. 2, 3/2009 DSP56724/DSP56725 www.datasheet4u.com Symphony™ DSP56724/ DSP56725 Multi-Core Audio Processors DSP56724 144-Pin LQFP 20 mm × 20 mm 0.5 mm pitch DSP56725 80-Pin LQFP 14 mm × 14 mm 0.65 mm pitch See Table 19. The Symphony DSP56724/DSP56725 Multi-Core Audio Processors are part of the DSP5672x family of programmable CMOS DSPs, designed using dual DSP56300 24-bit cores. The DSP56724 is intended for cons.

  DSP56724   DSP56724


Document
Freescale Semiconductor Data Sheet: Technical Data Document Number: DSP56724EC Rev. 2, 3/2009 DSP56724/DSP56725 www.datasheet4u.com Symphony™ DSP56724/ DSP56725 Multi-Core Audio Processors DSP56724 144-Pin LQFP 20 mm × 20 mm 0.5 mm pitch DSP56725 80-Pin LQFP 14 mm × 14 mm 0.65 mm pitch See Table 19. The Symphony DSP56724/DSP56725 Multi-Core Audio Processors are part of the DSP5672x family of programmable CMOS DSPs, designed using dual DSP56300 24-bit cores. The DSP56724 is intended for consumer and professional audio applications that require high performance for audio processing. In addition, the DSP56724 is ideally suited for applications that need the capability to expand memory off-chip or to interface to external parallel peripherals. Potential applications include A/V receivers, DVD Receivers, Home Theater in a Box (HTIB), and professional audio equipment including portable recording equipment, musical instruments, guitar amplifiers and pedals. The DSP56724 offers customers flexibility in their designs by providing a more cost-effective alternative to the DSP56720 while maintaining pin compatibility. The DSP56725 is intended for automotive and audio applications that require high performance for audio processing. Potential applications include A/V receivers, DVD Receivers, Home Theater in a Box (HTIB), and automotive amplifiers and entertainment systems. The DSP56725 offers customers flexibility in their designs by providing a more cost-effective alternative to the DSP56721 while maintaining pin compatibility. The DSP56724/DSP56725 devices provide a wealth of on-chip audio processing functions, via a plug and play software architecture system that supports audio decoding algorithms, various equalization algorithms, compression, signal generator, tone control, fade/balance, level meter/spectrum analyzer, among others. The DSP56724/DSP56725 devices also support various matrix decoders and sound field processing algorithms. With two DSP56300 cores, a single DSP56724/ DSP56725 device can replace dual-DSP designs, saving costs while meeting high MIPs requirements. Legacy peripherals from the previous DSP5636x/37x families are included, as are a variety of new modules available in the DSP5672x family. Modules from the DSP56720 are included, such as an Asynchronous Sample Rate Converter (ASRC), an Inter-Core Communication (ICC) module, an External Memory Controller (EMC) to support SDRAM (DSP56724 only), and a Sony/Philips Digital Interface (S/PDIF) transceiver. The DSP56724/DSP56725 devices offer up to 250 million instructions per second (MIPs) per core using an internal 250 MHz clock. The DSP56724/ DSP56725 products are high density CMOS devices with 3.3 V inputs and outputs. The DSP56724 block diagram is shown in Figure 1; the DSP56725 block diagram is shown in Figure 2. NOTE This document contains information on a new product. Specifications and information herein are subject to change without notice. Finalized specifications may be published after further characterization and device qualifications are completed. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © Freescale Semiconductor, Inc., 2009. All rights reserved. Table of Contents Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.1.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . .4 1.1.2 Thermal Characteristics. . . . . . . . . . . . . . . . . . . .6 www.datasheet4u.com 1.1.3 Power Requirements . . . . . . . . . . . . . . . . . . . . . .6 1.1.4 Power Consumption Considerations . . . . . . . . . .7 1.1.5 DC Electrical Characteristics . . . . . . . . . . . . . . . .8 1.1.6 AC Electrical Characteristics . . . . . . . . . . . . . . . .9 1.1.7 Internal Clocks . . . . . . . . . . . . . . . . . . . . . . . . . .9 1.1.8 External Clock Operation. . . . . . . . . . . . . . . . . .10 1.1.9 Reset, Stop, Mode Select, and Interrupt Timing 11 1.2 Module-Level Specifications . . . . . . . . . . . . . . . . . . . . .14 1.2.1 Serial Host Interface SPI Protocol Timing . . . . .15 1.2.2 Serial Host Interface (SHI) I2C Protocol Timing.21 1.2.3 Programming the SHI I2C Serial Clock . . . . . . .23 1.2.4 Enhanced Serial Audio Interface Timing . . . . . .24 1.2.5 GPIO Timing . . . . . . . . . . . . . . . . . . . . . . . . . . .29 1 1.2.6 JTAG Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 30 1.2.7 Watchdog Timer Timing . . . . . . . . . . . . . . . . . . 32 1.2.8 S/PDIF Timing . . . . . . . . . . . . . . . . . . . . . . . . . 33 1.2.9 EMC Timing Specifications—DSP56724 . . . . . 34 Functional Description and Application Information . . . . . . . 39 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4..


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