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LF11332 Dataheets PDF



Part Number LF11332
Manufacturers National Semiconductor
Logo National Semiconductor
Description Quad SPST JFET Analog Switches
Datasheet LF11332 DatasheetLF11332 Datasheet (PDF)

LF11331/LF13331/LF11332/LF13332/LF11333/LF13333/LF11201/LF13201/LF11202/LF13202 Quad SPST JFET Analog Switches January 1995 LF11331/LF13331/LF11332/LF13332/LF11333/ LF13333/LF11201/LF13201/LF11202/LF13202 Quad SPST JFET Analog Switches General Description These devices are a monolithic combination of bipolar and JFET technology producing the industry’s first one chip quad JFET switch. A unique circuit technique is employed to maintain a constant resistance over the analog voltage range of ± 10.

  LF11332   LF11332


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LF11331/LF13331/LF11332/LF13332/LF11333/LF13333/LF11201/LF13201/LF11202/LF13202 Quad SPST JFET Analog Switches January 1995 LF11331/LF13331/LF11332/LF13332/LF11333/ LF13333/LF11201/LF13201/LF11202/LF13202 Quad SPST JFET Analog Switches General Description These devices are a monolithic combination of bipolar and JFET technology producing the industry’s first one chip quad JFET switch. A unique circuit technique is employed to maintain a constant resistance over the analog voltage range of ± 10V. The input is designed to operate from minimum TTL levels, and switch operation also ensures a break-before-make action. These devices operate from ± 15V supplies and swing a ± 10V analog signal. The JFET switches are designed for applications where a dc to medium frequency analog signal needs to be controlled. Features n Analog signals are not loaded n Constant “ON” resistance for signals up to ± 10V and 100 kHz n Pin compatible with CMOS switches with the advantage of blow out free handling n Small signal analog signals to 50 MHz n Break-before-make action: tOFF < tON n High open switch isolation at 1.0 MHz: −50 dB n Low leakage in “OFF” state: < 1.0 nA n TTL, DTL, RTL compatibility n Single disable pin opens all switches in package on LF11331, LF11332, LF11333 n LF11201 is pin compatible with DG201 Test Circuit and Schematic Diagram DS005667-2 FIGURE 1. Typical Circuit for One Switch DS005667-12 FIGURE 2. Schematic Diagram (Normally Open) © 1999 National Semiconductor Corporation DS005667 www.national.com Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. (Note 2) Supply Voltage (VCC−VEE) Reference Voltage Logic Input Voltage Analog Voltage Analog Current 36V VEE≤VR≤VCC VR−4.0V≤VIN≤VR+6.0V VEE≤VA≤VCC+6V; VA≤VEE+36V |IA| < 20 mA Power Dissipation (Note 3) Molded DIP (N Suffix) Cavity DIP (D Suffix) Operating Temperature Range LF11201, 2 and LF11331, 2, 3 LF13201, 2 and LF13331, 2, 3 Storage Temperature Soldering Information N and D Package (10 sec.) SO Package: Vapor Phase (60 sec.) Infrared (15 sec.) 500 mW 900 mW −55˚C to +125˚C 0˚C to +70˚C −65˚C to +150˚C 300˚C 215˚C 220˚C Electrical Characteristics (Note 4) LF11331/2/3 Symbol RON RON Match VA IS(ON) + ID(ON) IS(OFF) ID(OFF) VINH VINL IINH IINL tON tOFF tON−tOFF CS(OFF) CD(OFF) CS(ON) + CD(ON) ISO(OFF) CT SR IDIS IEE IR ICC “OFF” Isolation Crosstalk Analog Slew Rate Disable Current Negative Supply Current Reference Supply Current Positive Supply Current (Figure 4), (Note 5) (Figure 4), (Note 5) (Note 6) (Figure 5), (Note 7) All Switches “OFF,” VS = ± 10V All Switches “OFF,” VS = ± 10V All Switches “OFF,” VS = ± 10V TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C −50 −65 50 0.4 0.6 3.0 4.2 2.0 2.8 4.5 6.3 1.0 1.5 5.0 7.5 4.0 6.0 6.0 9.0 −50 −65 50 0.6 0.9 4.3 6.0 2.7 3.8 7.0 9.8 1.5 2.3 7.0 10.5 5.0 7.5 9.0 13.5 dB dB V/µs mA mA mA mA mA mA mA mA Source Current in “OFF” Condition Drain Current in “OFF” Condition Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Input Current Logical “0” Input Current Delay Time “ON” Delay Time “OFF” Break-Before-Make Source Capacitance Drain Capacitance Active Source and Drain Capacitance VIN = 5V VIN = 0.8 VS = ± 10V, (Figure 3) VS = ± 10V, (Figure 3) VS = ± 10V, (Figure 3) Switch “OFF,” VS = ± 10V Switch “OFF,” VD = ± 10V Switch “ON,” VS = VD = 0V TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C TA = 25˚C 500 90 80 4.0 3.0 5.0 3.6 Switch “OFF,” VS = +10V, VD = −10V Switch “OFF,” VS = +10V, VD = −10V 2.0 0.8 10 25 0.1 1 500 90 80 4.0 3.0 5.0 3.6 TA = 25˚C TA = 25˚C Parameter “ON” Resistance “ON” Resistance Matching Analog Range Leakage Current in “ON” Condition Switch “ON,” VS = VD = ± 10V TA = 25˚C VA = 0, ID = 1 mA Conditions TA = 25˚C TA = 25˚C LF11201/2 Min Typ 150 200 5 Max 200 300 20 5 100 5 100 5 100 2.0 0.8 40 100 0.1 1 LF13331/2/3 LF13201/2 Min Typ 150 200 10 Max 250 350 50 10 30 10 30 10 30 Ω Ω Ω V nA nA nA nA nA nA V V µA µA µA ns ns ns pF pF pF Units ± 10 ± 11 0.3 3 0.4 3 0.1 3 ± 10 ± 11 0.3 3 0.4 3 0.1 3 Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 2: Refer to RETSF11201X, RETSF11331X, RETSF11332X and RETSF11333X for military specifications. Note 3: For operating at high temperature the molded DIP products must be derated based on a +100˚C maximum junction temperature and a thermal resistance of +150˚C/W, devices in the cavity DIP are based on a +150˚C maximum junction temperature and are derated at ± 100˚C/W. www.national.com 2 Electrical Characteristics (Note 4) (Continued) Note 4: Unless otherwise specified, VCC = +15V, VEE = −15V, VR = 0V, and limits apply for −55˚C≤TA≤+125˚C for the LF11331/2/3 and the LF11201/2, .


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