81 MSPS Analog Front-End
LM98725 3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/CMOS Output Integrated Sensor Timing Generator and SSCG
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Description
LM98725 3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/CMOS Output Integrated Sensor Timing Generator and SSCG
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April 6, 2009
LM98725
3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/ CMOS Output, Integrated CCD/CIS Sensor Timing Generator and SSCG
General Description
The LM98725 is a fully integrated, high performance 16-Bit, 81 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. Highspeed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a +/-9-Bit offset correction DAC and independently controlled Digital Black Level correction loops for each input. The PGA and offset DAC are programmed independently allowing unique values of gain and offset for each of the three inputs. The signals are then routed to a 81MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity, having a very low noise floor of -74dB. The 16-bit ADC has excellent dynamic performance making the LM98725 transparent in the image reproduction chain. A very flexible integrated SSCG (Spread Spectrum Clock Generation) modulator is included to assist with EM compliance and reduce system costs.
Features
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