CONTROL CIRCUITS. AZ7500E Datasheet

AZ7500E CIRCUITS. Datasheet pdf. Equivalent

Part AZ7500E
Description PULSE-WIDTH-MODULATION CONTROL CIRCUITS
Feature www.DataSheet4U.com Data Sheet PULSE-WIDTH-MODULATION CONTROL CIRCUITS General Description The AZ75.
Manufacture BCD Semiconductor
Datasheet
Download AZ7500E Datasheet



AZ7500E
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Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
General Description
Features
AZ7500E
The AZ7500E is a voltage mode pulse width modula- · Stable 4.95V Reference Voltage Trimmed to
tion switching regulator control circuit designed pri-
±1.0% Accuracy
marily for power supply control.
· Uncommitted Output TR for 200mA Sink or
Source Current
The AZ7500E consists of a reference voltage circuit, · Single-End or Push-Pull Operation Selected by
two error amplifiers, an on-chip adjustable oscillator, a
Output Control
dead-time control (DTC) comparator, a pulse-steering · Internal Circuitry Prohibits Double Pulse at Either
control flip-flop, and an output control circuit. The pre-
Output
cision of voltage reference (VREF) is improved up to
· Complete PWM Control Circuit with Variable
1% through trimming and this provides a better output
Duty Cycle
voltage regulation. The AZ7500E provides for push- · On-Chip Oscillator With Master or Slave Opera-
pull or single-ended output operation, which can be
tion
selected through the output control.
AZ7500E is the enhanced version of AZ7500B for it
improves REF Pin's reliability comparing with
AZ7500B.
The AZ7500E is available in standard packages of
DIP-16 and SOIC-16.
Applications
· SMPS
· Back Light Inverter
· Charger
SOIC-16
DIP-16
Oct. 2008 Rev. 1. 2
Figure 1. Package Types of AZ7500E
BCD Semiconductor Manufacturing Limited
1



AZ7500E
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PULSE-WIDTH-MODULATION CONTROL CIRCUITS
Pin Configuration
M Package
(SOIC-16)
P Package
(DIP-16)
Data Sheet
AZ7500E
1IN +
1IN -
FEEDBACK
DTC
CT
RT
GND
C1
1
2
3
4
5
6
7
8
16 2IN +
15 2IN -
14 REF
13 OUTPUT CTRL
12 VCC
11 C2
10 E2
9 E1
1IN +
1IN -
FEEDBACK
DTC
CT
RT
GND
C1
1
2
3
4
5
6
7
8
16 2IN +
15 2IN -
14 REF
13 OUTPUT CTRL
12 VCC
11 C2
10 E2
9 E1
Figure 2. Pin Configuration of AZ7500E (Top View)
Output Function Control Table
Signal for Output Control
VI = GND
VI = VREF
Output Function
Single-ended or parallel output
Normal push-pull operation
Functional Block Diagram
RT 6
5
CT
Oscillator
Dead-Time Control
Comparator
4
DTC
+
0.12V
1IN +
1IN -
1
2
Error Amplifier 1
+
+
PWM
Comparator
2IN + 16
2IN - 15
Error Amplifier 2
+
0.7mA
3
FEEDBACK
OUTPUT CTRL
Pulse-Steering
Flip-Flop
13
D
CK
Reference
Regulator
8 C1
Q1
9 E1
11 C2
Q2
10
E2
12
VCC
14
REF
7
GND
Figure 3. Functional Block Diagram of AZ7500E
Oct. 2008 Rev. 1. 2
BCD Semiconductor Manufacturing Limited
2





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