PSMN1R5-25YL
www.DataSheet4U.com
N-channel TrenchMOS logic level FET
Rev. 01 — 16 June 2009 Product data sheet
1. Prod...
PSMN1R5-25YL
www.DataSheet4U.com
N-channel TrenchMOS logic level FET
Rev. 01 — 16 June 2009 Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect
Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in industrial and communications applications.
1.2 Features and benefits
High efficiency due to low switching and conduction losses Suitable for logic level gate drive sources
1.3 Applications
Class-D amplifiers DC-to-DC converters Motor control Server power supplies
1.4 Quick reference data
Table 1. VDS ID Ptot Quick reference Conditions Tmb = 25 °C; VGS = 10 V; see Figure 1; Tmb = 25 °C; see Figure 2 [1] Min Typ Max 25 100 109 Unit V A W drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C drain current total power dissipation gate-drain charge Symbol Parameter
Dynamic characteristics QGD VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14; see Figure 15 VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14; see Figure 15 VGS = 10 V; ID = 15 A; Tj = 25 °C 9.2 nC
QG(tot)
total gate charge
-
36
-
nC
Static characteristics RDSon drain-source on-state resistance 1.13 1.5 mΩ
[1]
Continuous current is limited by package.
NXP Semiconductors
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PSMN1R5-25YL
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pin 1 2 3 4 mb S S S G D Pinning information Symbol Description source source source gate mounti...