74LVCH1T45 Datasheet (data sheet) PDF





74LVCH1T45 Datasheet, Dual Supply Translating Transceiver

74LVCH1T45   74LVCH1T45  

Search Keywords: 74LVCH1T45, datasheet, pdf, NXP, Dual, Supply, Translating, Transceiver, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute, Equivalent

www.DataSheet4U.com 74LVC1T45; 74LVCH1T 45 Dual supply translating transceiver; 3-state Rev. 01 — 11 May 2009 Produc t data sheet 1. General description Th e 74LVC1T45; 74LVCH1T45 are single bit, dual supply transceivers with 3-state outputs that enables bidirectional leve l translation. They feature one data in put-output port (A and B), a direction control input (DIR) and dual supply pin s (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage b etween 1.2 V and 5.5 V making the devic e suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and DIR are referenced to

74LVCH1T45 Datasheet, Dual Supply Translating Transceiver

74LVCH1T45   74LVCH1T45  
VCC(A) and pin B is referenced to VCC(B) . A HIGH on DIR allows transmission fro m A to B and a LOW on DIR allows transm ission from B to A. The devices are ful ly specified for partial power-down ap plications using IOFF. The IOFF circuit ry disables the output, preventing any damaging backflow current through the device when it is powered down. In susp end mode when either VCC(A) or VCC(B) a re at GND level, both A port and B port are in the high-impedance OFF-state. A ctive bus hold circuitry in the 74LVCH1 T45 holds unused or floating data inpu ts at a valid logic level. 2. Features I Wide supply voltage range: N VCC(A): 1.2 V to 5.5 V N VCC(B): 1.2 V to 5.5 V I High noise immunity I Complies with JEDEC standards: N JESD8-7 (1.2 V to 1 .95 V) N JESD8-5 (1.8 V to 2.7 V) N JES D8C (2.7 V to 3.6 V) N JESD36 (4.5 V to 5.5 V) I ESD protection: N HBM JESD22- A114E Class 3A exceeds 4000 V N CDM JES D22-C101C exceeds 1000 V I Maximum data rates: N 420 Mbps (3.3 V to 5.0 V tran slation) N 210 Mbps (translate to 3.3 V )) N 140 Mbps (translate to 2.5 V) N 75 Mbps (translate to 1.8 V) N 60 Mbps (t ranslate to 1.5 V) I Suspend mode www. DataSheet4U.com NXP Semiconductors 74 LVC1T45; 74LVCH1T45 Dual supply transla ting transceiver; 3-state I I I I I I I Latch-up performance exceeds 100 mA per JESD 78 Class








@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)