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Low-VIN LDO. FAN2560 Datasheet

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Low-VIN LDO. FAN2560 Datasheet






FAN2560 LDO. Datasheet pdf. Equivalent




FAN2560 LDO. Datasheet pdf. Equivalent





Part

FAN2560

Description

350mA Low-VIN LDO



Feature


FAN2560 — 350mA Low-VIN LDO with Fast Transient Response www.DataSheet4U.com February 2008 FAN2560 350mA Low-VIN LDO with Fast Transient Response Featur es ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ 55µA Typical Quiescent Curren t Up to 350mA Output Current 2.9V to 5. 5V Bias Supply Voltage VOUT+0.1V to 5.5 V Power Input Supply Voltage Fixed Volt age Options: 1.3V and 1.5V Thermal S.
Manufacture

Fairchild Semiconductor

Datasheet
Download FAN2560 Datasheet


Fairchild Semiconductor FAN2560

FAN2560; hutdown Protection (TSD) Input Under-Vol tage Lockout (UVLO) Short-Circuit Curre nt Protection (SCP) 5-bump 0.96 x 1.33m m WLCSP Description The FAN2560 is a l inear low-dropout (LDO) regulator with a split-supply architecture. Separate b ias and supply inputs allow bias to be taken directly from the battery, while the input is taken from a lower preregu lated source. This.


Fairchild Semiconductor FAN2560

allows a smaller differential voltage b etween input and output, which provides greater efficiency over a wider VBAT r ange. The FAN2560 is available in a fix ed-voltage output, 5-bump, WLCSP packag e. Applications Moderate Current Digit al Loads DVB-H, DMB Processors Handsets , Smartphones WLAN DC-DC Converter Modu les PDA, DSC, PMP, and MP3 Players Port able Hard Disk Dri.


Fairchild Semiconductor FAN2560

ves Typical Applications 2.9 to 5.5V VO UT +0.3V CIN VBAT VIN VOUT VBAT 2.9 t o 5.5V VIN VOUT GND 1 F FAN2560 GND CIN COUT 1μF FAN2560 2.2 F COUT 2.2μF EN EN Figure 1. Separate Supp ly and Bias Line Figure 2. Connected S upply and Bias Line Ordering Informati on Part Number FAN2560UC13X FAN2560UC15 X Operating Temperature Range -40°C t o 85°C -40°C to 85°C .

Part

FAN2560

Description

350mA Low-VIN LDO



Feature


FAN2560 — 350mA Low-VIN LDO with Fast Transient Response www.DataSheet4U.com February 2008 FAN2560 350mA Low-VIN LDO with Fast Transient Response Featur es ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ 55µA Typical Quiescent Curren t Up to 350mA Output Current 2.9V to 5. 5V Bias Supply Voltage VOUT+0.1V to 5.5 V Power Input Supply Voltage Fixed Volt age Options: 1.3V and 1.5V Thermal S.
Manufacture

Fairchild Semiconductor

Datasheet
Download FAN2560 Datasheet




 FAN2560
www.DataSheet4U.com
February 2008
FAN2560
350mA Low-VIN LDO with Fast Transient Response
Features
ƒ 55µA Typical Quiescent Current
ƒ Up to 350mA Output Current
ƒ 2.9V to 5.5V Bias Supply Voltage
ƒ VOUT+0.1V to 5.5V Power Input Supply Voltage
ƒ Fixed Voltage Options: 1.3V and 1.5V
ƒ Thermal Shutdown Protection (TSD)
ƒ Input Under-Voltage Lockout (UVLO)
ƒ Short-Circuit Current Protection (SCP)
ƒ 5-bump 0.96 x 1.33mm WLCSP
Applications
ƒ Moderate Current Digital Loads
ƒ DVB-H, DMB Processors
ƒ Handsets, Smartphones
ƒ WLAN DC-DC Converter Modules
ƒ PDA, DSC, PMP, and MP3 Players
ƒ Portable Hard Disk Drives
Description
The FAN2560 is a linear low-dropout (LDO) regulator
with a split-supply architecture. Separate bias and
supply inputs allow bias to be taken directly from the
battery, while the input is taken from a lower pre-
regulated source. This allows a smaller differential
voltage between input and output, which provides
greater efficiency over a wider VBAT range.
The FAN2560 is available in a fixed-voltage output,
5-bump, WLCSP package.
Typical Applications
2.9 to 5.5V
VOUT +0.3V
CIN
1F
VBAT
VIN
GND
EN
FAN2560
VOUT
COUT
2.2 F
2.9 to 5.5V
CIN
1μF
VBAT
VIN
GND
EN
FAN2560
VOUT
COUT
2.2μF
Figure 1. Separate Supply and Bias Line
Figure 2. Connected Supply and Bias Line
Ordering Information
Part Number
FAN2560UC13X
FAN2560UC15X
Operating Temperature Range
Package
-40°C to 85°C
WLCSP-5 0.96 x 1.33mm
-40°C to 85°C
WLCSP-5 0.96 x 1.33mm
All packages are lead free per JEDEC: J-STD-020B standard.
© 2006 Fairchild Semiconductor Corporation
FAN2560 • Rev. 1.0.0
Packing Method
Tape and Reel
Tape and Reel
www.fairchildsemi.com




 FAN2560
www.DataSheet4U.com
Block Diagram
Figure 3. IC Block Diagram
Pin Configuration
VIN A1 A3 VOUT
GND B2
VBAT C1 C3 EN
VOUT A3 A1 VIN
B2 GND
EN C3 C1 VBAT
TOP VIEW
BOTTOM VIEW
Figure 4. 0.96 x 1.33mm WLCSP package
Pin Definitions
Pin #
A1
A3
C1
C3
B2
Name
VIN
VOUT
VBAT
EN
GND
Description
Power supply input. A minimum 1μF MLCC is required to GND.
Output Voltage. A typical COUT=1μF to 2.2μF MLCC is required to GND, placed close to the
VOUT terminal.
Battery bias supply input. No capacitor is required unless another bulk capacitor is more than
few inches away.
Enable input. The device is in shutdown mode when the voltage at this pin is <0.4V and
enabled when >1.1V. The EN latches the LOW logic state once externally forced. Do not leave
this pin floating when the device is turned ON.
Ground pin. Connect to a PCB GND plane.
© 2006 Fairchild Semiconductor Corporation
FAN2560 • Rev. 1.0.0
2
www.fairchildsemi.com




 FAN2560
www.DataSheet4U.com
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VOUT
TJ
TSTG
TL
ESD
VBAT, VIN, EN
Output Voltage
Junction Temperature
Storage Temperature
Lead Soldering Temperature, 10 Seconds
Electrostatic Discharge Human Body Model per JESD22-A114
Protection Level
Charged Device Model per JESD22-C101
Min.
-0.3
-0.3
-40
-65
3.5
1.5
Max.
6.0
VIN + 0.3V
+150
+150
+260
Units
V
V
°C
°C
°C
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
VBAT
VIN
IOUT
CIN
Bias Supply Range, (VOUT + 1.4V) < VBAT
Power Supply Range, (VIN < VBAT)
Output Current
Input Capacitor (Effective Capacitance)
Equivalent Series Resistance (ESR)
COUT
Output Capacitor (Effective Capacitance)
Equivalent Series Resistance (ESR)
TA Operating Ambient Temperature Range
TJ Operating Junction Temperature Range
Min.
2.9
VOUT + VDO
0
0.7
0
0.7
3
-40
-40
Typ.
1.0
2.2
Max.
5.5
VBAT
350
300
12.0
300
+85
+125
Units
V
V
mA
μF
m
μF
m
°C
°C
Thermal Properties
Symbol
Parameter
Min.
Typ.
Max.
Units
ΘJA Junction-to-Ambient Thermal Resistance
180(1)
°C/W
Note:
1 Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with
four-layer boards in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed
junction temperature TJ(max) at a given ambient temperature TA.
© 2006 Fairchild Semiconductor Corporation
FAN2560 • Rev. 1.0.0
3
www.fairchildsemi.com






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