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LTC2174-14 Dataheets PDF



Part Number LTC2174-14
Manufacturers Linear Technology Corporation
Logo Linear Technology Corporation
Description Low Power Quad ADC
Datasheet LTC2174-14 DatasheetLTC2174-14 Datasheet (PDF)

LTC2175-14/ LTC2174-14/LTC2173-14 14-Bit, 125Msps/105Msps/ 80Msps Low Power Quad ADCs Features Description n 4-Channel Simultaneous Sampling ADC n 73.1dB SNR n 88dB SFDR n Low Power: 558mW/450mW/376mW Total, 140mW/113mW/94mW per Channel n Single 1.8V Supply n Serial LVDS Outputs: 1 or 2 Bits per Channel n Selectable Input Ranges: 1VP-P to 2VP-P n 800MHz Full Power Bandwidth S/H n Shutdown and Nap Modes n Serial SPI Port for Configuration n Pin Compatible 14-Bit and 12-Bit Versions n 52-Pin (.

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LTC2175-14/ LTC2174-14/LTC2173-14 14-Bit, 125Msps/105Msps/ 80Msps Low Power Quad ADCs Features Description n 4-Channel Simultaneous Sampling ADC n 73.1dB SNR n 88dB SFDR n Low Power: 558mW/450mW/376mW Total, 140mW/113mW/94mW per Channel n Single 1.8V Supply n Serial LVDS Outputs: 1 or 2 Bits per Channel n Selectable Input Ranges: 1VP-P to 2VP-P n 800MHz Full Power Bandwidth S/H n Shutdown and Nap Modes n Serial SPI Port for Configuration n Pin Compatible 14-Bit and 12-Bit Versions n 52-Pin (7mm × 8mm) QFN Package Applications n Communications n Cellular Base Stations n Software Defined Radios n Portable Medical Imaging n Multichannel Data Acquisition n Nondestructive Testing L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. The LTC®2175-14/LTC2174-14/LTC2173-14 are 4-channel, simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.1dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS. The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Typical Application CHANNEL 1 ANALOG S/H INPUT 1.8V VDD 14-BIT ADC CORE 1.8V OVDD CHANNEL 2 ANALOG S/H INPUT CHANNEL 3 ANALOG S/H INPUT 14-BIT ADC CORE 14-BIT ADC CORE DATA SERIALIZER CHANNEL 4 ANALOG S/H INPUT 14-BIT ADC CORE ENCODE INPUT PLL GND OGND OUT1A OUT1B OUT2A OUT2B OUT3A OUT3B OUT4A OUT4B DATA CLOCK OUT FRAME SERIALIZED LVDS OUTPUTS 217514 TA01 AMPLITUDE (dBFS) LTC2175-14, 125Msps, 2-Tone FFT, fIN = 70MHz and 75MHz 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 0 10 20 30 40 50 60 FREQUENCY (MHz) 217514 TA01b 21754314fa 1 LTC2175-14/ LTC2174-14/LTC2173-14 Absolute Maximum Ratings (Notes 1, 2) Supply Voltages VDD, OVDD................................................. –0.3V to 2V Analog Input Voltage (AIN+, AIN–, PAR/SER, SENSE) (Note 3)........... –0.3V to (VDD + 0.2V) Digital Input Voltage (ENC+, ENC–, CS, SDI, SCK) (Note 4)..................................... –0.3V to 3.9V SDO (Note 4).............................................. –0.3V to 3.9V Digital Outp.


LTC2175-14 LTC2174-14 LTC2173-14


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