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TECHNICAL DATA
KK4024B
7 Stage Ripple-Carry Binary Counter/Divider
High-Voltage Silicon-Gate CMOS...
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TECHNICAL DATA
KK4024B
7 Stage Ripple-Carry Binary Counter/Divider
High-Voltage Silicon-Gate CMOS
The KK4024B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the inputpulse line permits unlimited rise and fall times. Operating Voltage Range: 3.0 to 18 V Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply
ORDERING INFORMATION KK4024BN Plastic KK4024BD SOIC TA = -55° to 125° C for all packages
LOGIC DIAGRAM PIN ASSIGNMENT
FUNCTION TABLE
Inputs Clock Reset L L X H Output Output state No change Advance to next state All Outputs are low
PIN 14 =VCC PIN 7 = GND PIN 8,10,13 = NO CONNECTION
X=don’t care
1
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KK4024B
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN PD PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output
Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +20 -0.5 to ...