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AD7193 Dataheets PDF



Part Number AD7193
Manufacturers Analog Devices
Logo Analog Devices
Description 24-Bit Sigma-Delta ADC
Datasheet AD7193 DatasheetAD7193 Datasheet (PDF)

Data Sheet 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA AD7193 FEATURES Pressure measurement Fast settling filter option 4 differential/8 pseudo differential input channels RMS noise: 11 nV @ 4.7 Hz (gain = 128) 15.5 noise-free bits @ 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Temperature measurement Flow measurement Weigh scales Chromatography Medical and scientific instrumentation Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Specified drift over time .

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Data Sheet 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA AD7193 FEATURES Pressure measurement Fast settling filter option 4 differential/8 pseudo differential input channels RMS noise: 11 nV @ 4.7 Hz (gain = 128) 15.5 noise-free bits @ 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Temperature measurement Flow measurement Weigh scales Chromatography Medical and scientific instrumentation Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Specified drift over time Automatic channel sequencer Programmable gain (1 to 128) Output data rate: 4.7 Hz to 4.8 kHz Internal or external clock GENERAL DESCRIPTION The AD7193 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directly to the ADC. Simultaneous 50 Hz/60 Hz rejection The device can be configured to have four differential inputs or 4 general-purpose digital outputs eight pseudo differential inputs. The on-chip channel sequencer Power supply allows several channels to be enabled simultaneously, and the AVDD: 3 V to 5.25 V DVDD: 2.7 V to 5.25 V Current: 4.65 mA AD7193 sequentially converts on each enabled channel, simplifying communication with the part. The on-chip 4.92 MHz clock can be used as the clock source to the ADC or, alternatively, an external Temperature range: −40°C to +105°C clock or crystal can be used. The output data rate from the part 28-lead TSSOP and 32-lead LFCSP packages can be varied from 4.7 Hz to 4.8 kHz. Interface 3-wire serial SPI, QSPI™, MICROWIRE™, and DSP compatible Schmitt trigger on SCLK The device has a very flexible digital filter, including a fast settling option. Variables such as output data rate and settling time are dependent on the option selected. The AD7193 also includes a zero latency option. APPLICATIONS The part operates with a power supply from 3 V to 5.25 V. It PLC/DCS analog input modules consumes a current of 4.65 mA, and it is available in a 28-lead Data acquisition TSSOP package and a 32-lead LFCSP package. Strain gage transducers FUNCTIONAL BLOCK DIAGRAM AVDD AGND DVDD DGND REFIN1(+) REFIN1(–) AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 AIN8 AINCOM BPDSW AD7193 AGND MUX PGA Σ-Δ ADC TEMP SENSOR CLOCK CIRCUITRY MCLK1 MCLK2 Figure 1. SERIAL INTERFACE AND CONTROL LOGIC DOUT/RDY DIN SCLK CS SYNC P3 P2 P0/REFIN2(–) P1/REFIN2(+) 08367-001 Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2009–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD7193 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 3 Specifications..................................................................................... 4 Timing Characteristics ................................................................ 8 Absolute Maximum Ratings.......................................................... 10 Thermal Resistance .................................................................... 10 ESD Caution................................................................................ 10 Pin Configurations and Function Descriptions ......................... 11 Typical Performance Characteristics ........................................... 15 RMS Noise and Resolution............................................................ 18 Sinc4 Chop Disabled................................................................... 18 Sinc3 Chop Disabled................................................................... 19 Fast Settling ................................................................................. 20 On-Chip Registers .......................................................................... 21 Communications Register......................................................... 22 Status Register...........................................................................


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