SPP2319
P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2319 is the P-Channel logic enhancement mode power field e...
SPP2319
P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2319 is the P-Channel logic enhancement mode power field effect
transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching , and low in-line power loss are needed in a very small outline surface mount package.
APPLICATIONS Power Management in Note book Portable Equipment Battery Powered System DC/DC Converter Load Switch DSC LCD Display inverter
FEATURES -40V/-3.0A,RDS(ON)=96mΩ@VGS=-10V -40V/-2.8A,RDS(ON)=130mΩ@VGS=-4.5V Super high density cell design for extremely low
RDS (ON) Exceptional on-resistance and maximum DC
current capability SOT-23-3L package design
PIN CONFIGURATION ( SOT-23-3L )
PART MARKING
2022/06/07 Ver.3
Page 1
SPP2319
P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION Pin 1 2 3
Symbol G S D
Description Gate Source Drain
ORDERING INFORMATION
Part Number
Package
SPP2319S23RGB
SOT-23-3L
※ Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 )
※ SPP2319S23RGB : Tape Reel ; Pb – Free ; Halogen – Free
Part Marking 19
ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage Continuous Drain Current(TJ=150℃) Pulsed Drain Current
TA=25℃ T...