burst PSRAM. M36P0R8070E0 Datasheet

M36P0R8070E0 PSRAM. Datasheet pdf. Equivalent


Part M36P0R8070E0
Description 256 Mbit Flash memory 128 Mbit (burst) PSRAM
Feature M36P0R8070E0 256 Mbit (x16, multiple bank, multilevel, burst) Flash memory 128 Mbit (burst) PSRAM, 1.
Manufacture Numonyx
Datasheet
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M36P0R8070E0 256 Mbit (x16, multiple bank, multilevel, burst M36P0R8070E0 Datasheet
Recommendation Recommendation Datasheet M36P0R8070E0 Datasheet




M36P0R8070E0
M36P0R8070E0
256 Mbit (x16, multiple bank, multilevel, burst) Flash memory
128 Mbit (burst) PSRAM, 1.8 V supply, multichip package
Features
Multichip package
– 1 die of 256 Mbit (16 Mb x 16, multiple
bank, multilevel, burst) Flash memory
– 1 die of 128 Mbit (8 Mb x16) PSRAM
Supply voltage
– VDDF = VCCP = VDDQ = 1.7 to 1.95 V
– VPPF = 9 V for fast program (12 V tolerant)
Electronic signature
– Manufacturer code: 20h
– Device code: 8818
Package
– ECOPACK®
Flash memory
Synchronous/asynchronous read
– Synchronous burst read mode:
108 MHz, 66 MHz
– Asynchronous page read mode
– Random access: 93 ns
Programming time
– 4 µs typical Word program time using
www.DataSheet4UB.cuomffer Enhanced Factory Program
command
Memory organization
– Multiple bank memory array: 32 Mbit banks
– Four EFA (extended flash array) blocks of
64 Kbits
Dual operations
– Program/erase in one bank while read in
others
– No delay between read and write
operations
Security
– 64bit unique device number
– 2112 bit user programmable OTP Cells
100 000 program/erase cycles per block
FBGA
TFBGA107 (ZAC)
Block locking
– All blocks locked at power-up
– Any combination of blocks can be locked
with zero latency
– WPF for block lock-down
– Absolute write protection with VPPF = VSS
CFI (common Flash interface)
PSRAM
Access time: 70 ns
Asynchronous page read
– Page size: 4, 8 or 16 words
– Subsequent read within page: 20 ns
Synchronous burst read/write
Low power consumption
– Active current: < 25 mA
– Standby current: 200 µA
– Deep power-down current: 10 µA
Low power features
– PASR (partial array self refresh)
– DPD (deep power-down) mode
December 2007
Rev 2
1/22
www.numonyx.com
1



M36P0R8070E0
Contents
Contents
M36P0R8070E0
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Address inputs (A0-A23) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Data input/output (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Latch Enable (L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Clock (K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Wait (WAIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
www.DataSheet4U.com
2.18
2.19
2.20
2.21
2.22
Flash Chip Enable input (EF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Output Enable inputs (GF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Write Enable (WF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Write Protect (WPF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Reset (RPF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Deep Power-Down (DPDF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Chip Enable input (EP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Write Enable (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Output Enable (GP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Upper Byte Enable (UBP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Lower Byte Enable (LBP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Configuration Register Enable (CRP) . . . . . . . . . . . . . . . . . . . . . 11
VDDF supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VCCP supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VDDQ supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VPPF program supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VSS ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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