UPD46128512-X

PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT μPD46128512-X 128M-BIT CMOS MOBILE SPECIFIED RAM 8M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION Description The μPD46128512-X is a high speed, low power, 134,217,728 bits (8,388,608 words by 16 bits) CMOS Mobile Specified RAM featuring asynchronous page read and random write, synchronous burst read/write function. The μPD46128512-X is fabricated with advanced CMOS technology using one-transistor memory cell. Features 8,388,608 words by 16 bits organization Asynchronous page read mode Synchronous read and write mode Burst length: 8 words / 16 words / continuous Clock latency: 5, 6, 7, 8, 9, 10 Burst sequence: Linear burst Max clock frequency: 108/83 MHz Byte data control: /LB (DQ0 to DQ7), /UB (DQ8 to DQ15) Low voltage operation: 1.7 to 2.0 V Operating ambient temperature: TA = −30 to +85 °C Chip Enable input: /CE1 pin Standby Mode input: CE2 pin Standby Mode 1: Normal standby (Memory cell data hold valid) Standby Mode 2: Density of memory cell data hold is variable μPD46128512 Clock Asynchronous Operating supply voltage V Operating ambient temperature °C At operating mA (MAX.) (MAX.) Density of data hold 128M 32M bits -E9X Note Note Supply current At standby μA (TYP.) Density of data hold 0M bits 65 128M 32M bits 80 bits 16M bits 8M bits 0M bits 15 www.DataSheet4U.com frequency initial access MHz (MAX.) time ns (MAX.) 16M bits 8M bits bits 108 70 85 1.7 to 2.0 −30 to +85 60 50 60 50 250 ...