ADN4604 Switch Datasheet

ADN4604 Datasheet PDF, Equivalent


Part Number

ADN4604

Description

Digital Crosspoint Switch

Manufacture

Analog Devices

Total Page 30 Pages
Datasheet
Download ADN4604 Datasheet


ADN4604
4.25 Gbps,
16 × 16, Digital Crosspoint Switch
ADN4604
FEATURES
DC to 4.25 Gbps per port NRZ data rate
Programmable receive equalization
12 dB boost at 2 GHz
Compensates 40 inches of FR4 at 4.25 Gbps
Programmable transmit preemphasis/deemphasis
Up to 12 dB boost at 4.25 Gbps
Compensates 40 inches of FR4 at 4.25 Gbps
Low power: 130 mW per channel at 3.3 V (outputs enabled)
16 × 16, fully differential, nonblocking array
Double rank connection programming with dual
connection maps
Low jitter, typically 20 ps
Flexible I/O supply range
DC- or ac-coupled differential CML inputs
Programmable CML output levels
Per-lane input P/N pair inversion for routing ease
50 Ω on-chip I/O termination
Supports 8b/10b, scrambled or uncoded NRZ data
Serial (I2C slave or SPI) control interface
100-lead TQFP, Pb-free package
APPLICATIONS
Fiber optic network switching
High speed serial backplane routing to OC-48 with FEC
XAUI: 10GBASE-KX4
Gigabit Ethernet over backplane: 1000BASE-KX
1×, 2×, and 4× Fibre Channel
www.DaIntafiSnhieBeatn4dU®.com
Digital video (HDMI, DVI, DisplayPort, 3G-/HD-/SD-SDI)
Data storage networks
GENERAL DESCRIPTION
The ADN4604 is a 16 × 16 asynchronous, protocol agnostic,
digital crosspoint switch, with 16 differential PECL-/CML-
compatible inputs and 16 differential CML outputs.
The ADN4604 is optimized for nonreturn-to-zero (NRZ) sig-
naling with data rates of up to 4.25 Gbps per port. Each port
offers a fixed level of input equalization and programmable
output swing and output preemphasis.
FUNCTIONAL BLOCK DIAGRAM
DVCC
VCC
IP[15:0]
VTTIE,
VTTIW
IN[15:0]
RX TX
EQ
16 × 16
SWITCH
MATRIX
PRE-
EMPHASIS
OP[15:0]
VTTON,
VTTOS
ON[15:0]
RESET
UPDATE
I2C/SPI
ADDR1/SDI
ADDR0/CS
SDA/SDO
SCL/SCK
CONNECTION
MAP 0
CONNECTION
MAP 1
SERIAL
INTERFACE
CONTROL
LOGIC
OUTPUT
LEVEL
HOOKUP
TABLE
PER-PORT
OUTPUT
LEVEL
SETTINGS
ADN4604
VEE
Figure 1.
The ADN4604 nonblocking switch core implements a 16 × 16
crossbar and supports independent channel switching through
the serial control interface. The ADN4604 has low latency and
very low channel-to-channel skew.
An I2C® or SPI interface is used to control the device and pro-
vide access to advanced features, such as additional levels of
preemphasis and output disable.
The ADN4604 is packaged in a 100-lead TQFP package and
operates from −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.

ADN4604
ADN4604
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Functional Block Diagram .............................................................. 1 
General Description ......................................................................... 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Electrical Specifications............................................................... 3 
I2C Timing Specifications............................................................ 4 
SPI Timing Specifications ........................................................... 5 
Absolute Maximum Ratings............................................................ 6 
ESD Caution.................................................................................. 6 
Pin Configuration and Function Descriptions............................. 7 
Typical Performance Characteristics ........................................... 10 
Theory of Operation ...................................................................... 16 
Introduction ................................................................................ 16 
Receivers ...................................................................................... 16 
REVISION HISTORY
10/09—Revision 0: Initial Version
Switch Core ................................................................................. 17 
Transmitters ................................................................................ 19 
Termination................................................................................. 23 
I2C Serial Control Interface........................................................... 24 
Reset ............................................................................................. 24 
I2C Data Write............................................................................. 24 
I2C Data Read.............................................................................. 25 
SPI Serial Control Interface .......................................................... 26 
Register Map ................................................................................... 28 
Applications Information .............................................................. 32 
Supply Sequencing ..................................................................... 34 
Power Dissipation....................................................................... 34 
Output Compliance ................................................................... 34 
Printed Circuit Board (PCB) Layout Guidelines ................... 36 
Outline Dimensions ....................................................................... 38 
Ordering Guide .......................................................................... 38 
www.DataSheet4U.com
Rev. 0 | Page 2 of 40


Features 4.25 Gbps, 16 × 16, Digital Crosspoint Switch ADN4604 FEATURES DC to 4.25 Gbps per port NRZ data rate Programmable re ceive equalization 12 dB boost at 2 GHz Compensates 40 inches of FR4 at 4.25 G bps Programmable transmit preemphasis/d eemphasis Up to 12 dB boost at 4.25 Gbp s Compensates 40 inches of FR4 at 4.25 Gbps Low power: 130 mW per channel at 3 .3 V (outputs enabled) 16 × 16, fully differential, nonblocking array Double rank connection programming with dual c onnection maps Low jitter, typically 20 ps Flexible I/O supply range DC- or ac -coupled differential CML inputs Progra mmable CML output levels Per-lane input P/N pair inversion for routing ease 50 Ω on-chip I/O termination Supports 8b /10b, scrambled or uncoded NRZ data Ser ial (I2C slave or SPI) control interfac e 100-lead TQFP, Pb-free package FUNCT IONAL BLOCK DIAGRAM DVCC VCC IP[15:0] VTTIE, VTTIW RX 16 × 16 SWITCH MATRIX TX PREEMPHASIS OP[15:0] VTTON, VTTOS ON[15:0] EQ IN[15:0] CONNECTION MAP 0 CONNECTION MAP 1 OUTPUT LE.
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