Document
Microelectronics
DESCRIPTION
The CE2752 is a mixed signal CMOS monolithic audio digital to analog converter. It contains dual multi-bit sigma delta DAC. The system consists of 128-time interpolation filters, 3th order multi-bit Σ∆ modulators, switch capacitors and analog reconstruction filters. The multi-bit Σ∆ converter offers high tolerance to clock jitter and linearity. The CE2752 support data conversion from 32K to 192KHz. This chip operates at 3.3 volt to reduce the power consumption and the noise caused by the digital circuit switching. The CE2752 is ideal for DVD player, AV receiver and set-top box application. The CE2752 support 24, 20, 18 and 16-bit input data. It also support sampling frequency up to 192K.
CE2752
Stereo Audio DAC, 24-bit, 192kHz
FEATURES
• Stereo Audio DAC. - 100 dB SNR (A Weighted). - - 88dB THD + N Ratio (A Weighted). - 32K - 192 KHz. Sampling Rates. - I2S and Left Justified Digital Input Formats. - On -chip Reconstruction Filters. • • 3.3 Power Supply.
Applications
• Digital Surround Sound For Home Theatre. • DVD Player. • Car Audio. • Portable CD.
Block Diagram
XCK www.DataSheet4U.com
Clock Det.
CE2752
DIN1
80
LRCK BCK
77 78
DIGITAL AUDIO INPUT
INTERPOLATION FILTER
Σ∆ Mod. Σ∆ Mod.
D/A
AL
D/A
AR
Sampl Rate Det.
Control Logic
15
FMT
DEM
VCM
CEI Microelectronics Co. Ltd.
1-10
May 7, 2004
CE2752
DAC Performance
Item
1 2 3 4 5 6 7 8
PERFORMANCE SPECIFICATIONS
Audio Output Level (Vdd= 3.3 volt) Audio Bandwidth 20Hz - 20 KHz SNR (A-weight) THD +Noise (0dB, A-weight) Dynamic Range (A-weight) Channel Separation Nonlinear Distortion Channel Gain Error
Spec.
0.71 Vrms +/- 0.04 dB >100dB <88 dB 94 dB < -90 dB < 0.25 dB < 0.1 dB
www.DataSheet4U.com
2-10
May 7, 2004
CE2752
PIN ASSIGNMENT
LRCK DIN BCK TST VCM AR GND
1 2
14 13
XCK FMT DEM N/C N/C AL VDD
CE2752
3 4 5 6 7
12 11 10 9 8
PIN DESCRIPTION
Pin Name LRCk Pin # 1 Type I Description Left/Right Channel Clock pin. For Left justified mode, a high in SF indicates Left Channel Data, a low in SF indicates Right Channel Data. For I2S mode, a low in SF indicates Left Channel Data, a high in SF indicates Right Channel Data. Serial Audio Data Input. Audio Serial Data Clock Input. Test pin. This pin should be connected to ground. Common voltage De-coupling Pin Should be Connected to a 22 uF capacitor in parallel with a 0.1 uF. Analog right channel output ground 3.3 volt power supply. Analog left channel output Not used. can connected to ground. ‘low’ in normal operation, ‘high’ to enable de-emphasis filter. ‘low’ if the input is left justified format. ‘high’ if the input is I2S format. Master clock input.
DIN BCK TST VCM
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2 3 4 5 6 7 8 9 10,11 12 13 14
I I I I/O O GND +3.3V O N/C I I I
AR GND DVDD AL N/C DEM FMT XCK
3-10
May 7, 2004
CE2752
INTRODUCTION
The CE2752 is designed to supports DVD audio with sampling rate support from 32K up to 192K. It receives 24-16 bit digital sampled audio data either in left justified or I.