LY612568

® LY612568 Preliminary 0.2 5V 256K X 8 BIT HIGH SPEED CMOS SRAM REVISION HISTORY Revision Rev. 0.1 Rev. 0.2 Description Preliminary Revised Test Condition of ISB1/IDR Revised VTERM to VT1 and VT2 Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS Revised PACKAGE OUTLINE DIMENSION Issue Date Dec.6.2006 Aug.26.2009 www.DataSheet4U.com Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 0 ® LY612568 Preliminary 0.2 5V 256K X 8 BIT HIGH SPEED CMOS SRAM GENERAL DESCRIPTION The LY612568 is a 2,097,152-bit low power CMOS static random access memory organized as 262,144 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY612568 is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The LY612568 operates from a single power supply of 5V and all inputs and outputs are fully TTL compatible FEATURES „ Fast access time : 15/20/25ns „ Low power consumption: Operating current: 100/80/75mA (TYP.) Standby current: 100µA (TYP.) „ Single 5V power supply „ All inputs and outputs TTL compatible „ Fully...