Document
PRELIMINARY
JULY 2009
XR17V352
REV. P1.0.1
HIGH PERFORMANCE DUAL PCI EXPRESS UART
GENERAL DESCRIPTION
The XR17V3521 (V352) is a single chip 2-channel PCI Express (PCIe) UART (Universal Asynchronous Receiver and Transmitter), optimized for higher performance and lower power. The V352 serves as a single lane PCIe bridge to 2 indepedent enhanced 16550 compatible UARTs. The V352 is compliant to PCIe 2.0 Gen 1 (2.5GT/s). In addition to the UART channels, the V352 has 16 multi-purpose I/Os (MPIOs), a 16-bit general purpose counter/timer and a global interrupt status register to optimize interrupt servicing. Each UART of the V352 has many enhanced features such as the 256-bytes TX and RX FIFOs, programmable Fractional Baud Rate Generator, Automatic Hardware or Software Flow Control, Auto RS-485 Half-Duplex Direction Control, programmable TX and RX FIFO Trigger Levels, TX and RX FIFO Level Counters, infrared mode, and data rates up to 25Mbps. The V352 is available in a 113-pin STBGA package (9 x 9 mm).
NOTE 1: Covered by U.S. Patents #5,649,122, #6,754,839,
#6,865,626 and #6,947,999
FEATURES
• Single 3.3V power supply • Internal buck regulator for 1.2V core • PCIe 2.0 Gen 1 compliant • x1 Link, dual simplex, 2.5Gbps in each direction • EEPROM interface for configuration • Data read/write burst operation • Global interrupt status register for both UARTs • Up to 25 Mbps serial data rate • 16 multi-purpose inputs/outputs (MPIOs) • 16-bit general purpose timer/counter • Sleep mode with wake-up Indicator • Two independent UART channels controlled with
■ ■ ■ ■ ■ ■ ■ ■
16550 compatible register Set 256-byte TX and RX FIFOs Programmable TX and RX Trigger Levels TX/RX FIFO Level Counters Fractional baud rate generator Automatic RTS/CTS or DTR/DSR hardware flow control with programmable hysteresis Automatic Xon/Xoff software flow control RS-485 half duplex direction control output with programmable turn-around delay Multi-drop with Auto Address Detection Infrared (IrDA 1.1) data encoder/decoder
APPLICATIONS
• Next generation Point-of-Sale Systems • Remote Access Servers • Storage Network Management • Factory Automation and Process Control www.DataSheet4U.com • Multi-port RS-232/RS-422/RS-485 Cards
FIGURE 1. BLOCK DIAGRAM OF THE XR17V352
TX+ TXRX+ RXCLK+ CLKCLKREQ# RST#
C o n f ig u r a t io n S pace R e g is t e r s
■ ■
• Software compatible to XR17C15x, XR17D15x,
XR17V25x PCI UARTs
B u c k R e g u la to r
U A R C U A R TT C hh aa nn nn ee l l00
6 4 - b y t e T X F IF O U A R T 2 5 6 -b y t e T X F IF O IR U RA eR gT s TX & R X ENDEC R eg s IR EN DEC TX & R X DIF EO C B R G 6 4 - b y t e RE XN F BRG 2 5 6 - b y t e R X F IF O
T X [1 :0 ] T X [7 :0 ] R X [1 :0 ] R X [ 7 :0 ] R T S # [1 :0 ]
1 2 5 M H z C lo c k
P C Ie PC I Local In t e r f a c e Bus In te r fa c e
G lo b a l C o n fig u r a tio n R e g is te r s
D T R # [1 : 0 ] C T S # [1 :0 ]
EN 485# E N IR # EECK EEDI EEDO EECS
U AR T C hannel 2 U A R T C hannel 1
UART R egs 2 5 6 -b y t e T X F IF O
TX & RX
D S R # [1 :0 ]
C o n f ig u r a t io n SP pR ac eM EE O R e g is t e r s
In te r fa c e
UART
IR C h a nE nN eD lE 5C
D C D # [1 :0 ]
25 6 -C by en Rn Xe FlIF B RU GA R T ht a 6O
M u lti- p u r p o s e
R I# [ 1 : 0 ]
11 66 -- b it TT im im ee r /C r /C oo uu nn te te rr
In p u t s /O u tp u t s In p u ts /O u t p u t s C r y s ta l O s c /B u ff e r
M P IO [ 1 5 : 0 ]
TM RCK
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
XR17V352
PRELIMINARY
REV. P1.0.1
HIGH PERFORMANCE DUAL PCI EXPRESS UART FIGURE 2. 113-STBGA PINOUT
A 1 Corner
1 A B C D E F G H J K L 2 3 4 5 6 7 8 9 10 11
Transparent Top View
1 A B
www.DataSheet4U.com
NC MPIO3 MPIO6 GND RX+ GND TX+ GND CLKREQ# MPIO7 NC
2
MPIO0 MPIO2 MPIO4 TEST0 RXGND TXVCC12 PERST# MPIO8 MPIO10
3
NC NC MPIO1 MPIO5 GND REXT GND VCC33 MPIO9 MPIO11 MPIO12
4
GND NC NC GND CLK+ CLKGND GND MPIO13 MPIO14 GND
5
NC NC NC VCC33 GND
6
TMRCK ENIR# EN485# GND
7
TEST2 TEST1 FB VCC12
8
GND GND GND GND VCC33 GND VCC12
9
LX VCC33 VCC33 PWRGD TEST5 CD1# RTS1# RI0# RX0 TX0 EEDO
10
LX VCC33 ENABLE TEST3 TEST4# DSR1# RX1 TX1 DSR0# CTS0# RTS0#
11
NC VCC33 NC GND RI1# DTR1# CTS1# GND CD0# DTR0# NC
C D E F
G H J K L
VCC12 RESET# NC MPIO15
GND TMS TCK TRESET
VCC33 EECK TDO TDI
GND EEDI EECS GND
ORDERING INFORMATION
PART NUMBER XR17V352IB113-F PACKAGE 113-STBGA OPERATING TEMPERATURE RANGE -40°C to +85°C DEVICE STATUS In Development
2
PRELIMINARY
REV. P1.0.1
XR17V352
HIGH PERFORMANCE DUAL PCI EXPRESS UART
PIN DESCRIPTIONS
NAME PCIe SIGNALS CLK+ CLKTX+ TXRX+ RXCLKREQ# PERST# REXT E4 F4 G1 G2 E1 E2 J1 J2 F3 I I O O I I O I PCIe reference clock input. PCIe differential TX outputs PCIe differential RX inputs PCIe edge connector clock request PCIe edge connector reset Connect a 191 ohm 1% resistor to GND. This is used for PCIe PHY calibration. PIN # TYPE DESCRIPTION
MODEM OR SERIAL I/O INTERFACE TX0 RX0 K9 J9 O I UART channel 0 Transmit Data or inf.