PRELIMINARY
JULY 2009
XR17V352
REV. P1.0.1
HIGH PERFORMANCE DUAL PCI EXPRESS UART
GENERAL DESCRIPTION
The XR17V3521 (...
PRELIMINARY
JULY 2009
XR17V352
REV. P1.0.1
HIGH PERFORMANCE DUAL PCI EXPRESS UART
GENERAL DESCRIPTION
The XR17V3521 (V352) is a single chip 2-channel PCI Express (PCIe) UART (Universal Asynchronous Receiver and Transmitter), optimized for higher performance and lower power. The V352 serves as a single lane PCIe bridge to 2 indepedent enhanced 16550 compatible UARTs. The V352 is compliant to PCIe 2.0 Gen 1 (2.5GT/s). In addition to the UART channels, the V352 has 16 multi-purpose I/Os (MPIOs), a 16-bit general purpose counter/timer and a global interrupt status register to optimize interrupt servicing. Each UART of the V352 has many enhanced features such as the 256-bytes TX and RX FIFOs, programmable Fractional Baud Rate Generator, Automatic Hardware or Software Flow Control, Auto RS-485 Half-Duplex Direction Control, programmable TX and RX FIFO Trigger Levels, TX and RX FIFO Level Counters, infrared mode, and data rates up to 25Mbps. The V352 is available in a 113-pin STBGA package (9 x 9 mm).
NOTE 1: Covered by U.S. Patents #5,649,122, #6,754,839,
#6,865,626 and #6,947,999
FEATURES
Single 3.3V power supply Internal buck
regulator for 1.2V core PCIe 2.0 Gen 1 compliant x1 Link, dual simplex, 2.5Gbps in each direction EEPROM interface for configuration Data read/write burst operation Global interrupt status register for both UARTs Up to 25 Mbps serial data rate 16 multi-purpose inputs/outputs (MPIOs) 16-bit general purpose timer/counter Sleep mode w...