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74AVCH16T245 Dataheets PDF



Part Number 74AVCH16T245
Manufacturers NXP
Logo NXP
Description 16-bit Transceiver
Datasheet 74AVCH16T245 Datasheet74AVCH16T245 Datasheet (PDF)

74AVCH16T245 16-bit dual supply translating transceiver with configurable voltage translation; 3-state Rev. 01 — 14 October 2009 Product data sheet 1. General description The 74AVCH16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs.The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and two 8-bit input-output ports (nAn, nBn) each with its own output enable (nOE).

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74AVCH16T245 16-bit dual supply translating transceiver with configurable voltage translation; 3-state Rev. 01 — 14 October 2009 Product data sheet 1. General description The 74AVCH16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs.The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and two 8-bit input-output ports (nAn, nBn) each with its own output enable (nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active. The 74AVCH16T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2. Features www.DataSheet4U.com I Wide supply voltage range: N VCC(A): 0.8 V to 3.6 V N VCC(B): 0.8 V to 3.6 V I Complies with JEDEC standards: N JESD8-12 (0.8 V to 1.3 V) N JESD8-11 (0.9 V to 1.65 V) N JESD8-7 (1.2 V to 1.95 V) N JESD8-5 (1.8 V to 2.7 V) N JESD8-B (2.7 V to 3.6 V) I ESD protection: N HBM JESD22-A114E Class 3B exceeds 8000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Maximum data rates: N 380 Mbit/s (≥ 1.8 V to 3.3 V translation) NXP Semiconductors 74AVCH16T245 16-bit dual supply translating transceiver; 3-state I I I I I I I N 200 Mbit/s (≥ 1.1 V to 3.3 V translation) N 200 Mbit/s (≥ 1.1 V to 2.5 V translation) N 200 Mbit/s (≥ 1.1 V to 1.8 V translation) N 150 Mbit/s (≥ 1.1 V to 1.5 V translation) N 100 Mbit/s (≥ 1.1 V to 1.2 V translation) Suspend mode Bus hold on data inputs Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Package Temperature range Name 74AVCH16T245DGG −40 °C to +85 °C 74AVCH16T245DGV 74AVCH16T245EV 74AVCH16T245BQ −40 °C to +85 °C −40 °C to +125 °C −40 °C to +125 °C TSSOP48 Description plastic thin shrink small outline package; 48 leads; body width 6.1 mm Version SOT362-1 SOT480-1 Type number TSSOP48[1] plastic thin shrink s.


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