3NV04D VNS3NV04D Datasheet

3NV04D Datasheet, PDF, Equivalent


Part Number

3NV04D

Description

VNS3NV04D

Manufacture

STMicroelectronics

Total Page 14 Pages
Datasheet
Download 3NV04D Datasheet


3NV04D
® VNS3NV04D
“OMNIFET II”:
FULLY AUTOPROTECTED POWER MOSFET
TYPE
RDS(on)
VNS3NV04D 120 m(*)
Ilim
3.5 A (*)
Vclamp
40 V (*)
(*)Per each device
n LINEAR CURRENT LIMITATION
)n THERMAL SHUT DOWN
t(sn SHORT CIRCUIT PROTECTION
cn INTEGRATED CLAMP
un LOW CURRENT DRAWN FROM INPUT PIN
dn DIAGNOSTIC FEEDBACK THROUGH INPUT
roPIN
Pn ESD PROTECTION
ten DIRECT ACCESS TO THE GATE OF THE
lePOWER MOSFET (ANALOG DRIVING)
on COMPATIBLE WITH STANDARD POWER
sMOSFET
bDESCRIPTION
OThe VNS3NV04D is a device formed by two
-monolithic OMNIFET II chips housed in a
)standard SO-8 package. The OMNIFET II are
t(sdesigned in STMicroelectronics VIPower M0-3
cTechnology: they are intended for replacement of
ustandard Power MOSFETS from DC up to 50KHz
rodBLOCK DIAGRAM
SO-8
applications. Built in thermal shutdown, linear
current limitation and overvoltage clamp protects
the chip in harsh environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
lete P DRAIN1
bso OVERVOLTAGE
O CLAMP
DRAIN2
OVERVOLTAGE
CLAMP
INPUT1
GATE
CONTROL
GATE
CONTROL
INPUT2
OVER
TEMPERATURE
LINEAR
CURRENT
LIMITER
LINEAR
CURRENT
LIMITER
OVER
TEMPERATURE
SOURCE1
SOURCE2
September 2013
DocID7396 Rev 4
1/14
1

3NV04D
VNS3NV04D
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
VDSn
Drain-source Voltage (VINn=0V)
Internally Clamped
V
VINn
Input Voltage
Internally Clamped
V
IINn Input Current
+/-20
mA
RIN MINn Minimum Input Series Impedance
220
IDn Drain Current
Internally Limited
A
IRn Reverse DC Output Current
-5.5 A
VESD1 Electrostatic Discharge (R=1.5K, C=100pF)
4000
V
VESD2
Ptot
t(s)Tj
Tc
cTstg
Electrostatic Discharge on output pins only (R=330, C=150pF)
Total Dissipation at Tc=25°C
Operating Junction Temperature
Case Operating Temperature
Storage Temperature
duCONNECTION DIAGRAM (TOP VIEW)
16500
4
Internally limited
Internally limited
-55 to 150
V
W
°C
°C
°C
lete ProSOURCE 1
soINPUT 1
bSOURCE 2
OINPUT 2
1
4
8 DRAIN 1
DRAIN 1
DRAIN 2
5 DRAIN 2
duct(s) -CURRENT AND VOLTAGE CONVENTIONS
lete ProIIN1 RIN1
ObsoVIN1
IIN2 RIN2
INPUT 1
DRAIN 1
ID1
ID2
VDS1
INPUT 2
DRAIN 2
VIN2
SOURCE 1
SOURCE 2
VDS1
2/14
1


Features ® VNS3NV04D “OMNIFET II”: FULLY AUT OPROTECTED POWER MOSFET TYPE RDS(on) VNS3NV04D 120 mΩ (*) Ilim 3.5 A (*) Vclamp 40 V (*) (*)Per each device n LINEAR CURRENT LIMITATION )n THERMAL SHUT DOWN t(sn SHORT CIRCUIT PROTECTION cn INTEGRATED CLAMP un LOW CURRENT DRA WN FROM INPUT PIN dn DIAGNOSTIC FEEDBAC K THROUGH INPUT roPIN Pn ESD PROTECTION ten DIRECT ACCESS TO THE GATE OF THE l ePOWER MOSFET (ANALOG DRIVING) on COMPA TIBLE WITH STANDARD POWER sMOSFET bDESC RIPTION OThe VNS3NV04D is a device form ed by two -monolithic OMNIFET II chips housed in a )standard SO-8 package. The OMNIFET II are t(sdesigned in STMicroe lectronics VIPower M0-3 cTechnology: th ey are intended for replacement of usta ndard Power MOSFETS from DC up to 50KHz rodBLOCK DIAGRAM SO-8 applications. B uilt in thermal shutdown, linear curren t limitation and overvoltage clamp prot ects the chip in harsh environments. Fa ult feedback can be detected by monitor ing the voltage at the input pin. lete P DRAIN1 bso OVERVOLTAGE O CLA.
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