28F640L18

Intel StrataFlash® Wireless Memory (L18) 28F640L18, 28F128L18, 28F256L18 Datasheet Product Features High performance Read-While-Write/Erase — 85 ns initial access — 54 MHz with zero wait state, 14 ns clock-todata output synchronous-burst mode — 25 ns asynchronous-page mode — 4-, 8-, 16-, and continuous-word burst mode — Burst suspend — Programmable WAIT configuration — Buffered Enhanced Factory Programming (BEFP) at 5 µs/byte (Typ) — 1.8 V low-power buffered programming at 7 µs/byte (Typ) ■ Architecture — Asymmetrically-blocked architecture — Multiple 8-Mbit partitions: 64-Mbit and 128Mbit devices — Multiple 16-Mbit partitions: 256-Mbit devices — Four 16-Kword parameter blocks: top or bottom configurations — 64-Kword main blocks — Dual-operation: Read-While-Write (RWW) or Read-While-Erase (RWE) — Status Register for partition and device status ■ Power — VCC (core) = 1.7 V - 2.0 V — VCCQ (I/O) = 1.35 V - 2.0 V, 1.7 V - 2.0 V — Standby current: 30 µA (Typ) for 256-Mbit — 4-Word synchronous read current: 15 mA (Typ) at 54 MHz — Automatic Power Savings mode ■ Security — OTP space: 64 unique factory device identifier bits 64 user-programmable OTP bits Additional 2048 user-programmable OTP bits — Absolute write protection: VPP = GND — Power-transition erase/program lockout — Individual zero-latency block locking — Individual block lock-down ■ Software — 20 µs (Typ) program suspend — 20 µs (Typ) erase suspend — Intel® Flash Data Integrator optimized — Basic Command Set (BCS...