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XCR3512XL

Xilinx

512 Macrocell CPLD


Description
0 R XCR3512XL: 512 Macrocell CPLD 0 14 DS081 (v1.2) September 4, 2001 Advance Product Specification Features Lowest power 512 macrocell CPLD 7.5 ns pin-to-pin logic delays System frequencies up to 127 MHz 512 macrocells with 12,800 usable gates Available in small footprint packages - 208-pin PQFP (180 user I/O) - 256-ball FBGA (212 user I/O) -...



Xilinx

XCR3512XL

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