Document
PROCESS
CP285
Power Transistor
NPN - Silicon Power Transistor Chip
Central
TM
Semiconductor Corp.
PROCESS DETAILS Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization 105 x 105 MILS 9.5 MILS 32 x 22 MILS 33 x 24 MILS Al - 45,000Å Ti/Ni/Ag - (3000Å, 10,000Å, 10,000Å)
GEOMETRY GROSS DIE PER 5 INCH WAFER 1,486 PRINCIPAL DEVICE TYPES MJE13005
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R0 (20-January 2006)
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