ICS8512061I

SINGLE CHANNEL 0.7V DIFFERENTIALTO-LVTTL TRANSCEIVER ICS8512061I Features One HCSL output pair and one LVCMOS/LVTTL output One single-ended LVCMOS/LVTTL signal input LVTTL I/O signal: up to 250MHz HCSL interface pins in high impedance state when the device is powered down Power-up and power-down glitch-free Additive Phase Jitter, RMS: 0.23ps (typical) Full 3.3V operating supply -40°C to 85°C ambient operating temperature Available in lead-free (RoHS 6) package General Description ICS HiPerClockS™ The ICS8512061I is a transceiver which can interchange data across multipoint data bus structures. The device has an LVTTL driver and one HCSL receiver driver. It translates between LVTTL signals and HCSL signals. Applications Backplane Transmission Telecommunication System Data Communications ATCA Clock Distribution Block Diagram Pin Assignment GND QB DIR_SEL IN 1 2 3 4 8 7 6 5 QA nQA VDD IREF www.DataSheet4U.com QB IREF HCSL Interface QA ICS8512061I 8 Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View IN Pullup nQA DIR_SEL Pulldown IDT™ / ICS™ TRANSCEIVER 1 ICS8512061AGI REV. B NOVEMBER 19, 2008 ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER Table 1. Pin Descriptions Number 1 2 3 4 5 6 7, 8 Name GND QB DIR_SEL IN IREF VDD nQA, QA Power Output Input Input Input Power Output Pulldown Pullup Type Description Power supply ground. Single-ended output. LVCMOS/LVTTL interface levels. HCSL receiver and driver directio...