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NB6LQ572

ON Semiconductor

2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator

NB6LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator Multi−Level Inp...


ON Semiconductor

NB6LQ572

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Description
NB6LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator Multi−Level Inputs w/ Internal Termination The NB6LQ572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock / Data fanout buffer that operates up to 5 GHz / 6.5 Gbps respectively with a 2.5 V or 3.3 V power supply. Each INx/INx input pair incorporates a fixed Equalizer Receiver, which when placed in series with a Clock / Data path, will enhance the degraded signal transmitted across an FR4 backplane or cable interconnect. For applications that do not require Equalization, consider the NB6L572, which is pin−compatible to the NB6LQ572. The differential Clock / Data inputs have internal 50 W termination resistors and will accept differential LVPECL, CML, or LVDS logic levels. The NB6LQ572 incorporates a pair of Select pins that will choose one of four differential inputs and will produce two identical LVPECL output copies of Clock or Data. As such, the NB6LQ572 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The two differential LVPECL outputs will swing 750 mV when externally loaded and terminated with a 50 W resistor to VCC – 2 V and are optimized for low skew and minimal jitter. The NB6LQ572 is offered in a low profile 5x5 mm 32−pin QFN Pb −Free package. Application notes, models, and support documentation are available at www.onsemi.com. The NB6LQ572 is a member of the ECLinPS MAX™ f...




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